View ADM1033ARQ-REEL7_6862917.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

thermal monitor and fan speed (rpm) controller adm1033 rev. 0 in fo rmation furn ished by an alog d ev i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p at ent s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p at ent or p at ent ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t el: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r eser v ed . features 1 local and 1 re mote temperature channel 1.5c accu rac y on local and remote channels automatic seri es resistance c a ncellation on remote temperature c h annels > 1 k fast (up to 6 4 measurements per second) smbus 2.0, 1. 1, and 1. 0 compliant smbus addre s s input/location input to udid programmable over-/undert e m perature limi ts programmable fault queue smbusalert ou tpu t fail-saf e overt e mperature comparator output fan speed (rp m ) controller look-up table f o r temperature - to-fan-speed control linear and discrete options for look-u p table fa n _fa u l t ou tpu t therm input, use d to time prochot assertions ref input, us e d as re ference f o r therm ( prochot ) 3 v to 5. 5 v sup p ly small 16 -lea d qsop package applic ati o ns deskto p and n o tebo o k pcs embedded sy stems telecommunications equipm ent lcd projectors func ti on a l bl ock di a g r am alert comp analog multiplexer tach smbusalert therm sda scl gnd v cc drive adm1033 nc location smbus address mask registers fault queue therm percent timer fault queue hysteresis registers offset registers conversion rate register configuration registers band gap reference band gap temperature sensor src block fan speed counter temperature-to- fan-speed look-up table manual fan speed control registers fan response tach signal conditioning fan speed controller adc limit comparator value and limit registers status register serial bus interface address pointer register nc nc d? d+ fan_fault ref alert therm 15 8 14 7 16 6 5 12 11 10 9 8 4 2 1 13 3 04937-0-001 nc = no connect fi g ur e 1 . ?2008 scillc. all rights reserved. publication order number: january 2008 - rev. 1 adm1033/d
adm1033 rev. 0 | page 2 of 40 table of contents general description ......................................................................... 3 specifications..................................................................................... 4 absolute maximum ratings............................................................ 6 thermal characteristics .............................................................. 6 esd caution.................................................................................. 6 pin configuration and function descriptions............................. 7 typical performance characteristics ............................................. 8 functional description .................................................................. 10 internal registers........................................................................ 10 serial bus interface..................................................................... 10 location input ...................................................................... 10 smbus 2.0 arp-capable mode ................................................ 10 smbus 2.0 fixed-and-discoverable mode.............................. 12 smbus 2.0 read and write operations ................................... 12 register addresses for single/block byte modes ................... 14 write operations ........................................................................ 14 read operations ......................................................................... 15 smbus timeout .......................................................................... 15 packet error checking (pec) ................................................... 15 alert response address (ara) ................................................ 15 temperature measurement system.............................................. 16 internal temperature measurement ........................................ 16 remote temperature measurement......................................... 16 additional functions ................................................................. 18 layout considerations ................................................................... 19 limits, status registers, and interrupts ....................................... 20 8-bit limits.................................................................................. 20 out-of-limit comparisons ....................................................... 20 analog monitoring cycle time................................................ 20 status registers ........................................................................... 20 alert interrupt behavior........................................................ 21 handling smbusalert interrupts......................................... 22 interrupt masking register ....................................................... 22 fan_fault output ................................................................. 23 fault queue ................................................................................. 23 conversion rate register .......................................................... 23 therm i/o timer and limits ................................................ 23 therm % limit register ......................................................... 24 fan drive signal ......................................................................... 25 synchronous speed control ..................................................... 25 fan inputs.................................................................................... 26 fan speed measurement ........................................................... 26 fan speed measurement registers........................................... 27 reading fan speed ..................................................................... 27 calculating fan speed ............................................................... 27 alarm speed................................................................................ 27 look-up table: modes of operation....................................... 28 look-up table ............................................................................ 28 setting up the look-up table in linear mode...................... 29 selecting which temperature channel controls a fan......... 29 look-up table hysteresis ......................................................... 29 programming the therm limit for temperature channels ....................................................................................................... 30 xor tree test mode.................................................................. 30 lock bit........................................................................................ 30 sw reset...................................................................................... 30 outline dimensions ....................................................................... 39 ordering guide .......................................................................... 39 revision history 8/04?revision 0: initial version rev. 1 | page 2 of 39 | www.onsemi.com reson sor 01/08rev 1: conversion to on semiconductor 08/04revision 0: initial version
adm1033 rev. 0 | page 3 of 40 general description the adm1033 is a remote and local temperature sensor and fan controller. its remote channel accurately monitors the temperature of a remote thermal diode, which can be a discrete 2n3904/6 or located on a microprocessor die. the device can monitor its own ambient temperature as well. the adm1033 is also used to monitor and control the speed of a cooling fan. the user can program a target fan speed, or use the look-up table to input a temperature-to-fan speed profile. the look-up table can be configured to run the fan at discrete speeds (discrete mode) or to ramp the fan speed with tempera- ture (linear mode). the adm1033 communicates over a 2-wire smbus 2.0 inter- face. an 8-level location input allows the user to choose between smbus 1.1 and smbus 2.0. the alert output indicates error conditions. in addition, the therm i/o signals overtemperature as an output and times therm assertions as an input. pin 8 can be configured as a reference input for the therm ( prochot ) input. rev. 1 | page 3 of 39 | www.onsemi.com
adm1033 rev. 0 | page 4 of 40 specifications t a = t min to t max , v cc = v min to v max , unless otherwise noted. 1 table 1. parameter min typ max units test conditions/comments power supply supply voltage, v cc 2 3.0 3.3 3.6 v supply current, i cc 3 ma interface inactive, adc active 900 a standby mode undervoltage lockout th reshold 2.5 v power-on reset threshold 1 2.4 v temperature-to-digital converter internal sensor accuracy 1 2 c 20c t a 60c ?4 +2 c ? 40c t a +100c resolution 0.03125 c external diode sensor accuracy 0.5 1 c ? 40c t d +100c; t a = +40c 1 c ? 40c t d +100c; +20c t a +60c ?3 +2 c ? 40c t d +100c; ? 40c t a +100c resolution 0.03125 c remote sensor source current 85 a high level 34 ? mid level 5 ? low level series resistance cancellation 1000 power supply sensitivity 1 %/v conversion time (local temperature) 11 ms averaging enabled conversion time (remote temperature) 32 ms averaging enabled total conversion time 43 ms averaging enabled open-drain digital outputs ( alert , therm , fan_fault drive) output low voltage, v ol 0.4 v i out = ? 6.0 ma; v cc = +3 v high level output leakage current, i oh 0.1 1 a v out = v cc ; v cc = 3 v digital input leakage current (tach) input high current, i ih ?1 a v in = v cc input low current, i il 1 a v in = 0 input capacitance, c in 7 pf digital input logic levels (tach) input high voltage, v ih 2.0 5.5 v input low voltage, v il ? 0.3 +0.8 v hysteresis 500 mv p-p open-drain serial data bus output (sda) output low voltage, v ol 0.4 v i out = ? 6.0 ma; v cc = +3 v high level output leakage current, i oh 0.1 1 a v out = v cc serial bus digital inputs (scl, sda) input high voltage, v ih 2.1 v input low voltage, v il 0.8 v hysteresis 500 mv analog inputs (location, ref) input resistance 80 125 160 k rev. 1 | page 4 of 39 | www.onsemi.com
adm1033 rev. 0 | page 5 of 4 0 parameter min typ max units test condition s /comments tachome t er a c c u r a c y fan speed measurement accuracy 4 % agtl + in put ( ther m ) input high level 0.75 ref v input low level 0.4 v serial bus timi ng 3 see figure 2 clock fre quenc y , f sclk 400 khz glitch immunity, t sw 5 0 n s bus free time, t buf 1.3 s start setup time, t su :st a 0.6 s start hold time, t hd:sta 0.6 s stop condition setup time, t su : s t o 0.6 s scl low time, t low 1.3 s scl high time, t high 0.6 s scl, sda rise ti me, t r 1000 ns scl, sda fall time, t f 3 0 0 n s data setup tim e , t su :dat 100 n s detect clock lo w t imeout, t ti me o u t 25 35 ms see note 4 1 t y pi ca ls a r e a t t a = 25c a n d r e pr es en t m o st li k e ly pa r a m e t r i c n o rm . st a n db y curr en t typ i s m e a s ur ed wi t h v cc = 3.3 v . t iming s p ecif ica t i o ns ar e t e s t ed a t lo gic l e v e ls of v il = 0.8 v f o r a fa l l i n g edg e a n d v ih = 2 . 1 v f o r a ri si n g e d g e . 2 o p er a t i o n a t 5.5 v is gua r a n t eed b y de si g n , n o t pr o d uc t i o n t e st ed . 3 guarante e d by d e sign, no t pro d uctio n te s t ed . 4 smbu s t i m eout di s a bled b y d e fa u l t . s e e t h e s m bu s t i m e o u t se c t i o n f o r m o r e i n f o rm a t i o n . p s t low t r t f t hd:sta t hd:dat t su:dat t su:sta t hd:sta t su:sto t high scl ps sd a t buf 04937-0-003 f i gure 2. s e r i al bus t i ming d i agr a m rev. 1 | page 5 of 39 | www.onsemi.com
adm1033 rev. 0 | page 6 of 4 0 absolute maximum ratings table 2. p a r a m e t e r v a l u e positive supply voltage (v cc ) ? 0.3 v to +6.5 v voltage on any input or output pin ex cept fan_fault and location ? 0.3 v to +6.5 v voltage on fan_fault 1 v cc voltage on loc a t i on v cc + 0.3v input current at any pin 20 ma maximum junction temperature (t j max) 150c storage temperature range ? 65c to +150c lead temperature, soldering (10 sec) 300c ir reflow peak temperature 220c esd rating?all pins 1500 v 1 during power-up, the voltage on fan_f a ult sh oul d no t be highe r than v cc . s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n gs ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s ra t i n g onl y ; f u n c t i o n al o p era t ion o f t h e de vice a t t h es e o r an y o t h e r con d i t io ns a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c t io n o f t h is sp e c if ic a t io n is no t im plie d . e x p o sur e t o a b s o l u te max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i li t y . thermal c h aracteristics 16-l e ad qso p p a c k a g e: ja = 150c/w , jc = 39c/w esd caution es d (e lec t r o s t a t ic dis c ha rg e) s e n si t i v e de vic e . e l ec tr os ta tic c h a r g e s as hig h as 4 000 v r e adil y ac c u m u la t e s o n t h e h u man b o d y a nd te st e q ui pm en t an d can dis c ha rge w i t h o u t dete c t ion. a l t h o u g h t h is pr o d uc t fe a t ur es p r o p ri e t a r y es d p r o t ecti o n ci r c ui tr y , pe rm a n en t d a ma g e ma y occur o n d e v i ces s u b j ect e d t o h i gh en e r g y ele c t r o s t a t i c di s c ha rges. th er efo r e, p r o p er es d p r e c a u t i o n s a r e r e co mm e nde d to a v o i d p e r f o r ma nce d e g r a d a t i o n or l o ss of f u nc t i on a lit y . rev. 1 | page 6 of 39 | www.onsemi.com
adm1033 rev. 0 | page 7 of 4 0 pin conf iguration and fu nction descriptions 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 tach alert comp nc therm v cc gnd drive sda smbusalert location d+ fan_fault/ref d? nc nc scl top view (not to scale) adm1033 04937-0-002 nc = no connect f i gure 3. pin config ur ation ta ble 3. pi n f u nct i on d es c ri pt i ons pin no. mnemonic description 1 drive drive pin drive s the fan. open-dr ain output. re q u ires a pull-up resistor. 2 tach fan speed measurement input. connects to the fan?s tach outp ut to measure t h e fan speed. 3 alert comp open-drai n active low output. asserts lo w whe n ever a mea s urement goes outside its program m ed limits, if not masked. automatically go es high again w h en the measur ed parameter falls b a ck withi n its limits. 4 nc no connect. 5 gnd ground for analog and digital circuitry. 6 v cc power. can be p o wered by 3.3 v stand b y power, if monitoring in low po wer stat es is required . 7 ther m can be configur ed as an overte mperature interrupt output, or as an input to m o nitor prochot output of an intel cpu. a timer measures assertion times on the ther m pin (either input or output). 8 fan_fault /ref fan_fault : open-drai n output. asserts low whene ver the fan stalls . ref: analog input reference for ther m input. 9 d ? cathode conne ction for the thermal diod e or diode-connect ed transistor. 10 d+ anode connecti o n for the thermal diode or di ode-connected t r ansistor. 11 nc no connect. 12 nc no connect. 13 location 8-level analog i n put. used to determine the co rrect smbus version and the smbus address (in fixed-and- discoverable mode), and to set the lll bits in t h e udid (in arp - capable mode). 14 smbusaler t open-drai n output. alerts the system in the case of out-of-limit events such as o vertemperature. can be reset only with s o ftware. 15 sda serial bus bid i re ctional data. co nnects to the sm bus maste r?s data line. require s a pull-up resist or, if one is not provided elsewhere in the sy stem. 16 scl serial smbus clock input. connects to the sm bus master?s cl oc k line. requires a pull-up resi sto r, if one is not provided elsewhere in the sy stem. rev. 1 | page 7 of 39 | www.onsemi.com
adm1033 rev. 0 | page 8 of 4 0 typical perf orm ance cha r acte ristics leakage resistance (m : ) te mp erature e rror ( q c) 40 20 ?20 0 ?60 ?40 ? 100 ?80 0 102 0 30 40 50 60 70 809 0 100 04937-0-004 d+ to gnd d+ to v cc f i g ure 4. t e mper at ur e e r ror v s . pc b t r ack r e s i s t a nce , d x p t o gnd a nd v cc capacitance (nf) te mp e rature e rror ( q c) 0 ?10 ?30 ?20 ?60 ?70 ?40 ?50 ?80 04 26 8 10 04937-0-005 12 dev 33 ( q c) dev 32 ( q c) dev 31 ( q c) f i gure 5. r e mo te t e mpe r atu r e e r ror v s . d+, d? capa cit a n c e series resistance in d+/d? lines (k : ) te mp e rature e rror ( q c) 100 90 80 70 60 50 40 30 20 10 0 ?1 0 12 3 4 6 5 04937-0-006 dev 31 dev 32 dev 33 f i gure 6. r e mo te t e mpe r atu r e e r ror v s . s e ries r e s i s t ance o n d+ and d? te mp e rature e rror ( q c) 20 15 10 5 0 ?5 ?1 0 01 m 2m 3m 4m 6 5m 04937-0-007 m ext 100mv p-p ext 250mv p-p f i gure 7. r e mo te t e mpe r atu r e e r ror v s . p o wer su p p ly no is e f r eque nc y noise frequency (hz) te mp e rature e rror ( q c) 50 45 40 35 30 25 20 15 10 5 00 01 m 2m 4m 3m 5m 6m 04937-0-008 20mv 50mv 100mv f i gure 8. r e mo te t e mpe r atu r e e r ror v s . co mm on-m ode n o is e f r equenc y coupl e d on d + an d d? noise frequency te mp e rature e rror ( q c) 4.0 3.5 3.0 2.5 1.5 2.0 1.0 0.5 0 01 m 3m 2m 5m 4m 6m 04937-0-009 10mv 20mv f i gure 9. r e mo te t e mpe r atu r e e r ror v s . d i fferenti a l-m o de nois e f r eque nc y coupl e d on d + an d d? rev. 1 | page 8 of 39 | www.onsemi.com
adm1033 rev. 0 | page 9 of 4 0 s1 s2 s3 s4 s5 v1 v2 v3 v4 v5 diode temperature ( q c) te mp e rature e rror ( q c) 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 ?7 ? 60 ? 40 ?20 0 80 100 120 40 60 20 140 04937-0-010 mean high 4 sigma low 4 sigma f i g u re 10. r e m o t e t e m p er at ure e r r o r v s . ac t u al d i ode t e mpe r at u r e s1 s2 s3 s4 s5 v1 v2 v3 v4 v5 temperature ( q c) e rror ( q c) 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 ?7 ? 50 0 100 50 150 04937-0-011 mean high 4 sigma low 4 sigma f i gure 11. l o c a l t e mpe r atu r e e r ror v s . ac tual t e mpe r atu r e fscl (khz) i cc ( p a) 430 420 410 400 390 380 370 360 1 10 1000 100 04937-0-012 dev 33 dev 32 dev 31 f i gure 12. standb y sup p ly c u rrent vs. sclk f r equ e nc y supply voltage (v) s t andby s u p p l y curre nt 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 02 45 3 1 04937-0-013 6 f i gure 13. standb y sup p ly c u rrent vs. sup p ly v o ltag e conversion rate (hz) i cc ( p a) 1200 1000 800 600 400 200 0 0.01 0.1 1 100 10 04937-0-014 dev 33 dev 32 dev 31 f i gure 14. sup p l y current v s . con v e r s i on r a te temperature ( q c) s u p p l y curre nt 1.55 1.50 1.45 1.40 1.35 1.30 1.25 ? 60 ? 40 ? 20 0 100 40 60 80 20 04937-0-015 f i gure 15. sup p l y current v s . a dm10 3 3 t e mper ature rev. 1 | page 9 of 39 | www.onsemi.com
adm1033 rev. 0 | page 10 of 40 functional description the ad m1033 is a lo cal and r e m o te t e m p er a t u r e m o ni t o r a nd fan co n t r o l l er us e d in a va r i ety o f a p plic a t ion s, in cl u d in g mic r op ro c e ss or -b as e d s y ste m s. the d e v i c e ac c u r a tely mon i tors r e m o te an d am b i e n t te m p er a t u r e a nd us es t h a t info r m a t io n to q u i e tl y co n t r o l th e s p ee d o f a co o li n g fa n . w h en ev e r th e fa n st a l ls, t h e d e vice ass e r t s a fa n _fa u l t output . the ad m1033 has a therm i/o . a s an in p u t, this meas ur es ass e r t io n s o n t h e therm p i n. a s an o u t p u t , i t ass e r t s a l o w sig n al t o indic a te w h en t h e me as ur e d t e m p er a t ur e exce e d s t h e pro g r a m m e d therm t e m p er a t ur e limi ts. th e ad m103 3 co mm unic a t es o v er a n s m b u s 2.0 in t e r f ace . i t s l o ca ti on in p u t det e r m i n e s w h ich v e rsio n o f s m bus t o use , as w e l l as t h e s m bus addr ess (in f i xe d-and- di s c o v er a b le m o d e ), a nd t h e l o ca ti o n b i ts in t h e ud id (in arp - c a p a b le m o de). internal registers t a b l e 4 g i v e s a b r ief des c r i p t io n o f th e ad m103 3? s p r in c i p a l in t e r n a l r e g i st ers. f o r m o r e det a i le d info r m a t ion o n t h e f u nc t i o n of e a ch re g i ste r , re f e r to . serial bus interface the ad m1033 co mm unic a t es wi t h t h e mas t er via t h e 2-wir e s m b u s 2.0 in t e r f ace . i t s u p p o r ts tw o s m b u s 2.0 v e rsio n s, det e r m i n e d b y t h e va l u e o f t h e l o c a ti o n i n p u t r e sis t o r s. the f i rst versio n is f u l l y arp - c a p a ble. thi s me an s t h a t i t s u p p o r ts addr ess r e s o l u tio n p r ot o c ol (arp), al lo win g t h e master to d y namica l l y addr ess t h e d e vice on p o w e r - u p . i t re sp ond s to a r p co m m a nd s su ch a s ?pre p a re t o a r p . ? the s e cond s m bus versio n, f i x e d-and- dis c o v e r a b le, is bac k wa r d -com p a tib le wi th s m b u s 1.0 a n d 1.1. i n this m o de , the ad m1033 p o w e rs u p wi t h a f i xed addr es s, whic h is det e r m ine d b y t h e s t a t e o f t h e lo c a ti o n p i n on p o w e r - up . n o t e : w h e n usin g th e ad m 1033, addr es s e s 0xc2 a nd 0xca s h o u ld n o t b e us ed b y a n y o t her de vice on the b u s. locati on i n put the lo c a ti on in p u t is a r e sisto r divider i n pu t. i t has m u lt i p le fun c ti o n s a n d ca n s p eci f y th e fo llo w i n g: th e s m b u s v e r si o n (in f i xe d-and- di s c o v er a b le o r a r p - ca p a b le mo des); t h e s m bus addr ess (i n f i xe d-and- dis c o v er a b le m o de); and t h e ll l b i ts (in udid in a r p - ca p a b l e mo de). the v o l t a g e o f t h is 8-le ve l in p u t is s e t b y a p o t e n t i a l divid e r . the vol t a g e on lo c a t i on is s a m p le d o n p o w e r - up a nd dig i t i ze d b y t h e o n -chi p ad c t o de t e r m ine t h e l o c a ti o n i n p u t va l u e . b e ca us e t h e lo ca ti on in p u t is s a m p le d o n ly a t p o w e r - u p , cha n ges mad e w h i l e p o w e r is a p plie d h a v e n o ef fe c t . v cc gnd ad m 1 03 3 r1 r2 loc a t i on pin 13 04937-0-016 f i gure 1 6 . boo t str a p p i n g the l o ca tio n input smbus 2.0 arp-capabl e mode i n arp - c a p a b le m o de , the ad m 1033 s u p p o r ts suc h f e a t ur es as addr ess r e s o l u t i o n p r o t o c ol (a rp) a nd uni q ue de vice i d en t i f i er (ud i d). the ud id is a 128-b i t m e s s a g e tha t des c r i bes t h e ad m1033? s ca p a b i li t i es t o the mas t er . th e udid als o in c l udes a v e n d or -sp e cif i c id f o r f u n c tio n al l y eq ui valen t de vices. v cc 1.5k: 1k : 1k : 1k : 1k : 1k : 1.5k: gnd a d m 1033 n o . 1 a d m 1033 n o . 2 a d m 1033 n o . 3 a d m 1033 n o . 5 a d m 1033 n o . 7 arp location = 111 arp location = 11 0 a d m 1033 n o . 4 arp location = 101 arp location = 10 0 a d m 1033 n o . 6 fd address = 53h fd address = 52h a d m 1033 n o . 8 fd address = 51h fd address = 50h 04937- 0- 017 f i g ure 17. s e t t i ng u p m ult ipl e a dm 1 03 3 addr es s e s i n s m b u s 2.0 mo de , this v e n d o r -s p e c i f i c id is g e n e r a t e d b y a n on - c h i p r a nd o m n u mb e r ge ne r a tor . t h i s s h ou ld e n abl e t w o ad jacen t ad m1 033s in t h e s a me sys t em t o p o w e r - u p wi t h a dif f er en t v e n d o r -s p e c i f i c id , al lo win g t h e mas t er t o iden t i f y t h e tw o s e p a ra t e ad m1033s a nd as sig n a dif f er en t addr es s t o each. the s t a t e o f t h e l o c a ti o n i n p u t o n p o w e r - up is als o r e f le c t e d in t h e ud id . this is us ef u l w h en t h er e a r e m o r e t h a n on e ad m1033 in t h e sys t em, s o t h e mas t er k n o w s w h ic h on e i t is co mm unic a t in g wi t h . th e ud i d val u es a r e lis t e d in t a b l e 6. the s m bus 2.0 mas t er iss u es b o t h g e neral an d dir e c t e d a r p co mman d s. a gen e ra l command is dir e c t e d a t a l l arp d e vices. a dir e c t e d co m m a nd is t a rgete d a t a sin g le de v i ce, o n c e a n addr es s has b e e n es t a b lish e d . th e p e c b y t e m u s t b e us e d fo r arp co mman ds (r ef er t o p a c k et er r o r ch ec king (p ec)). t h e ad m1033 r e s p o n ds t o t h e f o l lo w in g co mmands: x p r ep a r e t o arp (g en eral) x res e t de vic e (gen er a l and dir e c t e d ) x g e t udid (ge n er a l a nd dir e c t e d ) x a s sig n addr es s (g en eral) rev. 1 | page 10 of 39 | www.onsemi.com
adm1033 rev. 0 | page 11 of 40 table 4. internal register descriptions register description configuration provides control and configur ation of various functions on the device. conversion rate determines the number of meas urements per second completed by the adm1033. address pointer contains the address that selects one of the other internal registers. when writing to the adm1033, the first byte of data is always a register address, which is written to the address pointer register. status provides the status of each limit comparison. interrupt mask allows the option to mask alert s due to particular out-of-limit conditions. value and limit stores the results of temperature and fan speed measurements, alon g with their limit values. offset allows the local and remote temperatur e channel readings to be offset by a twos complement value written to them. these values are automatically a dded to the temperature values (or subt racted from them if negative). this allows the systems designer to optimize the system, if required, by adding or subtracting up to 15.875c from a temperature reading. therm limit and hysteresis contains the temperature value at which therm is asserted and determines the level of hysteresis. look-up table used to program the look-up ta ble for the fan-speed-to-temperature profile. therm % ontime and therm % limit reflects the state of the therm input and monitors the duration of the assertio n time of the signal as a percentage of a time window. the user ca n program the length of the time window. table 5. resistor ratios for setting location bits ideal ratio r2/(r1 + r2) r1 (k) r2 (k) actual r2/(r1 + r2) error (%) smbus mode smbus address udid lll n/a 0 o/c 1 0 arp 1 n/a 111 0.8125 18 82 0.82 +0.75 arp 1 n/a 110 0.6875 22 47 0.6812 ?0.63 arp 1 n/a 101 0.5625 12 15 0.5556 ?0.69 arp 1 n/a 100 0.4375 15 12 0.4444 +0.69 fd 1 0x53 n/a 0.3125 47 22 0.3188 +0.63 fd 1 0x52 n/a 0.1875 82 18 0.18 ?0.75 fd 1 0x51 n/a n/a o/c 0 0 0 fd 1 0x50 n/a 1 fd denotes fixed-and-discoverable mode, arp denotes arp-capable mode. table 6. udid values bit no. name function value <127:120> device capabilities describes the adm1033?s capabilities (for instance, that it supports pec and uses a random number address device) 11000001 <1119:112> version/revision: udid version number (ver sion 1) and silicon revision identification 00001010 <111:96> vendor id vendor id number, assigned by th e sbs implementer?s forum or the pci sig 00010001 11010100 <95:80> device id device id 00010000 00110011 <79:64> interface identifies the protocol layer interfaces supported by the adm1033. this represents smbus 2.0 as the interface version. 00000000 00000100 <63:48> subsystem vendor id subsystem vendor id = 0 (subsystem fields are unsupported) 00000000 00000000 <47:32> subsystem device id subsystem devi ce id = 0 (subsystem fields are unsupported) 00000000 00000000 <31:0> vendor-specific id a unique number per device. contai ns the location information (lll) and a 16-bit random number (x). see table 5 for information on setting the lll bits. 00000000 00000lll xxxxxxxx xxxxxxxx rev. 1 | page 11 of 39 | www.onsemi.com
adm1033 rev. 0 | page 12 of 40 smbus 2.0 fixed-and-discoverable mode the adm1033 supports fixed-and- discoverable mode, which is backward-compatible with smbus 1.0 and 1.1. fixed-and- discoverable mode supports all the same functionality as arp- capable mode, except for assign address ?in which case it powers up with a fixed address and is not changed by the assign address call. the fixed address is determined by the state of the location pin on power-up. smbus 2.0 read and write operations the master initiates a data transfer by establishing a start condition, defined as a high-to-low transition on the serial data line (sda) while the serial clock line (scl) remains high. this indicates that an address/data stream is to follow. all slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, which consist of a 7- bit address (msb first) plus an r/ w bit. the last bit determines the direction of the data transfer (whether data is written to or read from the slave device). 1. the peripheral that corresponds to the transmitted address responds by pulling the data line low during the low period before the 9 th clock pulse. this pulse is known as the acknowledge bit. all other devices on the bus remain idle while the selected device waits for data to be read from or written to it. if the r/ w bit is a 0, the master writes to the slave device. if the r/ w bit is a 1, the master reads from it. 2. data is sent over the serial bus in sequences of nine clock pulses?eight bits of data followed by an acknowledge bit from the slave device. transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, as a low-to-high transition when the clock is high might be interpreted as a stop signal. the number of data bytes that can be transmitted over the serial bus in a single read or write operation is limited only by what the master and slave devices can handle. 3. when all data bytes have been read or written, stop conditions are established. in write mode, the master pulls the data line high during the tenth clock pulse to assert a stop condition. in read mode, the master device overrides the acknowledge bit by pulling the data line high during the low period before the ninth clock pulse. this is known as no acknowledge. the master takes the data line low during the low period before the tenth clock pulse, then high during the tenth clock pulse to assert a stop condition. it is not possible to mix read and write in one operation, because the type of operation is determined at the beginning and cannot be changed without starting a new operation. to write data to one of the device data registers or read data from it, the address pointer register (apr) must be set so that the correct data register is addressed. the first byte of a write operation always contains an address that is stored in the apr. if data is to be written to the device, the write operation contains a second data byte. the second data byte is written to the register selected by the apr. as shown in figure 18, the device address is sent over the bus, followed by r/ w set to 0. this is followed by two data bytes. the first data byte is the address of the designated internal data register, which is stored in the apr. the second data byte is the data to be written to the internal data register. when reading data from a register there are two possibilities: x if the adm1033?s apr value is unknown or incorrect, it must be set to the correct value before data can be read from the desired data register. to do this, perform a write to the adm1033 as before; but this time send only the data byte containing the register. (see figure 19.) a read operation is then performed. with the serial bus address and the r/ w bit set to 1, the data byte is read from the data register. (see figure 20.) x if the apr is known to be already at the desired address, data can be read from the corresponding data register without first writing to the apr. in this case, figure 19 can be omitted. in figure 18 to figure 20, the serial bus address is determined by the state of the location pin on power-up. rev. 1 | page 12 of 39 | www.onsemi.com
adm1033 rev. 0 | page 13 of 40 start by master stop by master ack. by adm1033 ack. by adm1033 ack. by adm1033 a6 11 9 a5 a4 a3 a2 a1 a0 r/w d7 d6 d5 d4 d3 d2 d1 d0 scl sda frame 1 serial bus address byte frame 2 address pointer register byte frame 3 data byte 9 sda (continued) scl (continued) 9 1 d7 d6 d5 d4 d3 d2 d1 d0 04937-0-021 f i gur e 1 8 . w r i t i ng a regi ster a ddr ess t o the a ddr ess p o i n t e r re gi st er , th en wr i t i n g d a ta t o the s e l ect e d re gi st er stop by master ack. by adm1033 ack. by adm1033 start by master scl 11 9 frame 1 serial bus address byte frame 2 address pointer register byte 9 04937-0-022 a6 a5 a4 a3 a2 a1 a0 r/w d7 d6 d5 d4 d3 d2 d1 d0 sda f i g ure 19. w r it ing t o t he addres s p o int e r r e g i s t er o nly ( s e nd b y te) stop by master start by master ack. by adm1033 no ack. by adm1033 r/w scl 11 9 9 s d a a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 frame 1 serial bus address byte frame 2 data byte from adm1033 04937-0-023 f i g ure 20. r e ad ing d a t a f r o m a p r ev i o us ly s e lec t ed r e g i s t er rev. 1 | page 13 of 39 | www.onsemi.com
adm1033 rev. 0 | page 14 of 40 register addresses for single/block byte modes the ad m1033 s u p p o r ts sin g le-b yt e an d m u l t i p le-b yt e (b lo ck) r e ad an d wr i t e o p era t io ns. th e r e g i s t er addr es s det e r m i n es w h et her a sin g l e -b y t e o r b lo c k o p era t ion is r u n. f o r a sin g le- b y t e o p era t io n, t h e msb o f t h e r e g i s t er addr es s is s e t t o 0; fo r a m u l t i p le -b yt e op era t ion, i t is s e t t o 1. the n u m b er o f b y t e s r e ad f r o m th e ad m1 033 in a m u l t i p l e -b yt e o p era t ion is s e t in t h e #byt es/blo ck r e ad reg i st er a t a ddr es s 0x00. th e n u m b er o f b y t e s wr i t t e n t o i t is sp e c if ie d in t h e b lo c k- wr i t e o p era t ion. t h e a d d r e s s e s q u o t ed i n th e r e gi s t e r m a p a n d th r o u g h o u t th i s d a ta s h e e t ass u m e si n g le-b yt e op era t io n. f o r m u l t i p le-b yt e o p er a - tio n s, s e t t h e m s b o f e a c h r e g i st er addr es s t o 1. the s m bus sp e c if ica t ion s def i ne p r o t o c ols fo r dif f er en t ty p e s o f r e ad an d wr i t e o p era t io ns. th e ad m1033 s u p p o r ts th e f o l l ow i n g sm bu s w r it e proto c o ls: s e n d by te, w r ite by te, bl o c k wr i t e, r e cei v e b y t e , an d b lo c k r e ad . t h e fol lo w ing a b b r e v i a t i on s are us e d i n t h e d i ag r a ms : s?s t ar t p? s t o p r? r e a d w? w r i t e a? a ck n o w le d ge a ?n o a c kno w led ge write oper ations s e nd by t e i n t h is o p er a t ion, t h e m a ster de vice s e n d s a si ng le-co mmand b y te to a s la v e d e v i c e a s fol low s: 1. the mas t er de v i ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the ma ster s e nds a 7- b i t addr e s s fol lo w e d b y th e wr i t e b i t (lo w ). 3. the ad dr ess e d sla v e de vic e ass e r t s a c k o n s d a. 4. the ma ster s e nds t h e r e g i ster a ddr ess. 5. the sl a v e ass e r t s a c k on s d a. 6. the ma st er ass e r t s a st o p con d i t io n o n s d a, and t h e tra n sa cti o n en ds. slave address s reg address w a a p 04937-0-018 f i g ure 21. s e nd b y t e the ad m1033 us es th e s e nd-b y t e o p era t io n t o wr i t e a r e g i s t er addr ess t o t h e a p r fo r a subs e q uen t r e ad f r o m t h e s a me addr es s. this is i l l u s t ra t e d i n f i gur e 21. th e us er ma y b e r e q u ir ed t o r e ad da ta f r o m t h e reg i s t er immedia t e l y a f t e r s e t t ing u p t h e addr es s. i f s o , t h e mas t er ca n as s e r t a r e p e a t st a r t co ndi t i on im me di a t ely a f ter t h e f i na l a c k and c a r r y o u t a si n g le-b yt e r e ad wi t h o u t as se r t in g a n in t e r m e d ia t e s t o p co n d i t i o n. wr i t e b y t e i n t h is o p era t ion, t h e mas t er de vice s e n d s t h e r e g i s t er addr es s a nd on e da t a b y t e t o t h e s l a v e de v i ce as fol lo w s: 1. the mas t er ass e r t s a s t a r t con d i t io n o n s d a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol lo w e d b y a wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the mas t er s e nds t h e r e g i st er addr es s. th e msb o f t h e co mman d co de s h o u ld eq ual 0 fo r a wr i t e-b y t e o p era t ion. i f t h e ms b e q ua ls 1, a b lo c k- wr i t e o p era t io n t a k e s place . 5. the s l a v e as s e r t s a c k on s d a. 6. the ma ster s e nds a da t a b y te. 7. the s l a v e as s e r t s a c k on s d a. 8. the mas t er ass e r t s a s t o p con d i t io n o n s d a t o e nd t h e tra n sa cti o n . slave address s reg address data w a a a p 04937-0-019 f i g u re 22. w r it e b y t e block w r it e i n t h is o p era t ion, t h e mas t er de vice wr i t es a b lo c k o f da t a t o a s la v e addr es s as fol l o w s. a maxim u m n u m b er o f 32 b y t e s ca n be w r i t t e n . 1. the mas t er ass e r t s a s t a r t con d i t io n o n s d a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol lo w e d b y a wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the mas t er s e nds t h e r e g i st er addr es s. this r e g i s t er addr es s s e ts u p t h e addr es s p o in t e r r e g i st er a nd de t e r m i n es if a b lo c k wr i t e (msb = 1) o r a b y t e wr i t e (m s b = 0) t a k e s place. 5. the s l a v e as s e r t s a c k on s d a. 6. the mas t er s e nds t h e b y te co u n t. 7. the s l a v e as s e r t s a c k on s d a. 8. the ma ster s e nds n da t a b y tes. 9. the s l a v e as s e r t s a c k on s d a a f t e r e a ch b y te . 10. the mas t er ass e r t s a s t o p con d i t io n o n s d a t o e nd t h e tra n sa cti o n . slave address s byte count data 2 data 1 register address w a a p a a a data n a 04918-0-020 f i g u re 23. bl ock w r ite rev. 1 | page 14 of 39 | www.onsemi.com
adm1033 rev. 0 | page 15 of 40 read oper ations re ce i v e b y t e this o p er a t io n i s us ef u l w h e n r e p e a t e d ly r e adi n g a sin g le r e g i s t er . the r e g i s t er addr es s m u s t b e s e t u p p r i o r t o t h is, wi t h t h e msb a t 0 t o r e ad a sin g le b y te . i n t h is o p er a t i o n, t h e mast er de vice r e cei v es a sin g le b y t e f r om a sla v e device as f o l lo w s: 1. the mas t er de v i ce as s e r t s a s t a r t co n d i t ion o n sd a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol lo w e d b y t h e re a d bit ( h i g h ) . 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the mas t er r e ce i v es a da t a b y te . 5. the mas t er s e nds n o a c k on s d a. 6. the ma st er ass e r t s a st o p con d i t io n o n s d a an d t h e tra n sa cti o n en ds. i n t h e ad m103 3, th e r e cei v e-b y t e p r o t o c ol is us ed t o r e ad a sin g le b y t e f r o m a r e g i s t er w h os e addr es s has p r e v i o u s l y b e e n s e t by a s e n d - by t e or w r it e - by t e op e r a t i o n . slave address s data r a a p 04937-0-024 f i g u re 24. r e c e ive b y te block r e a d i n t h is o p era t ion, t h e m a ster r e ads a b lo c k o f d a t a f r o m a sl a v e de vice . the n u m b er o f b y t e s to b e r e ad m u s t b e s e t i n ad v a nc e . to d o t h i s, us e a wr i t e - b y t e op era t io n t o t h e #byt es/blo ck re ad reg i st er a t a d dr es s 0x00. th e r e g i s t er addr es s det e r m i n es w h et her a b lo c k - r e ad o r a r e a d - b y t e o p era t io n i s t o b e c o m p le te d ( s e t m s b to 1 to sp e c i f y a bl o c k - re a d op e r a t i o n) . a maxim u m n u m b er o f 32 b y t e s ca n be r e ad . 1. the mas t er ass e r t s a s t a r t con d i t io n o n s d a. 2. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol lo w e d b y t h e wr i t e b i t (lo w ). 3. the addr es s e d sla v e de vic e as s e r t s a c k o n s d a. 4. the mas t er s e nds t h e r e g i st er addr es s (ms b = 1). 5. the sl a v e ass e r t s a c k on s d a. 6. the mas t er ass e r t s a r e p e a t e d st a r t o n s d a. 7. the mas t er s e nds t h e 7 - b i t sla v e addr es s fol lo w e d b y t h e re a d bit ( h i g h ) . 8. the sl a v e ass e r t s a c k on s d a. 9. the s l a v e s e n d s t h e b y te co un t. 10. the mas t er ass e r t s a c k o n s d a. 11. the s l a v e s e n d s n da t a b y t e s. 12. the mas t er ass e r t s a c k o n s d a a f t e r e a ch da t a b y t e . 13. the mas t er do e s n o t ack n o w le dg e a f t e r t h e n t h da t a b y te . 14. the mas t er ass e r t s a s t o p con d i t io n o n s d a t o e nd t h e tra n sa cti o n . slave address s byte count data 1 register address w a p a a a data n slave address s r a 04918- 0- 025 a f i g ure 25. bl ock r e ad f r om r a m smbus time out the ad m1033 has a p r og ra mma b le s m b u s tim e o u t f e a t ur e . w h en t h is is ena b le d , t h e s m bus typ i cal l y t i mes o u t a f t e r 25 m s o f n o a c ti vi t y . th e tim e o u t i s d i sa b led b y d e fa ul t . i t p r ev en t s s m bus ha n gu p s b y r e le asin g t h e b u s a f t e r a p e r i o d o f inac t i vi ty . t o e n a b le th e s d a tim e o u t , se t th e s d a t i m e o u t b i t (b i t 5) o f c o nf igura t io n reg i st er 1 (a ddr e s s 0x01) t o 1. t o e n a b le th e sc l tim e o u t , se t th e scl tim e o u t b i t (b i t 4) o f c o nf igura t io n reg i st er 1 (a ddr e s s 0x01) t o 1. packet error checking ( p ec) the ad m1033 s u p p o r ts p a ck et er r o r c h ec kin g (p ec). this o p ti o n al f e a t ur e i s tri g g e r e d b y th e e x tra c lock f o r th e p e c b y t e . the p e c b y te is calc u la t e d using cr c-8. the f r a m e che c k s e q u e n ce (fcs) co nfo r m s t o cr c-8 b y t h e fol l o w in g: 1 ) ( 2 8 x x x x c f o r m o r e info r m a t ion, co n s u l t w w w .s mbus.o rg. alert response addr ess (ara) alert response address s device address r a a p 04937-0-043 f i gur e 2 6 . al er t res p o n se a ddr ess w h en m u l t i p le de vices exis t on t h e s a me b u s, t h e aler t r e s p o n s e addr es s (ar a ) fe a t ur e al lo ws an in t e r r u p t i n g de vice t o iden t i f y i t s e lf t o t h e h o s t . th e aler t outp ut ca n b e us e d a s an i n te r r upt output or a s an sm b a le r t . o n e o r m o r e aler t output s ca n b e co n n e c te d to a co m m on sm b a le r t li n e , w h ich is co nne c t e d to t h e master . i f a de vice ? s aler t lin e g o es l o w , t h e f o ll o w i n g p r oc ed u r e oc cu r s: 1. sm b a le r t is p u l l ed lo w . 2. the mas t er ini t i a t e s a r e cei v e - b y t e o p era t io n and s e n d s t h e aler t r e s p o n s e addr es s (ara 00 01 100). this is a g e n e ral cal l addr ess t h a t m u st n o t b e us e d a s a sp e c if ic de vi ce addr ess. 3. the de v i ce wi t h t h e lo w aler t output re sp ond s to t h e ar a, an d t h e mas t er r e ads i t s de v i ce addr es s. o n ce t h e addr ess is k n o w n, i t c a n b e in ter r o ga t e d i n t h e usua l w a y . 4. if l o w aler t o u t p u t is det e c t e d i n m o re t h a n on e de vi ce , t h e on e w i t h t h e lo w e s t de vice addr es s has p r io r i ty , i n acco r d an c e wi t h n o r m al s m b u s a r b i tr a t ion. 5. on ce t h e ad m 1033 has r e s p onded t o t h e ara, i t r e s e ts i t s aler t o u t p ut. i f t h e er r o r p e rsis ts, t h e aler t is r e - as s e r t ed on t h e n e xt m o ni t o r i ng c y c le . rev. 1 | page 15 of 39 | www.onsemi.com
adm1033 rev. 0 | page 16 of 40 temperature measurement system internal temperatur e measurement the ad m1033 co n t a i n s an o n -c hi p band ga p tem p er a t ur e s e ns or . t h e on - c h i p a d c p e r f or ms co n v e r si on s on t h e s e n s or? s o u t p ut an d o u t p u t s t h e t e m p er a t ur e da t a i n 13- b i t fo r m a t . th e r e s o l u tio n o f the lo cal t e m p er a t ur e s e n s o r is 0.03125c. t a b l e 7 sh o w s t h e fo r m a t o f t h e t e m p era t ur e da t a ms bs. t a b le 8 show s t h e l o c a l an d re mote s e n s or e x te nd e d re s o lut i on d a t a f o r t h e l s bs. t o e n sure a c c ur a te re a d i n gs, t h e l s bs shou ld b e re a d f i rs t. this lo cks t h e c u r r en t ls b s a nd ms bs u n t i l t h e m s bs a r e r e ad . t h e y t h e n st a r t to u p da te aga i n. (re a ding o n ly t h e ms b s do es n o t lo ck t h e r e g i s t ers.) t e m p er a t ur e up da t e s t o t h e lo ok- u p t a b l e t a k e place in p a r a l lel, s o fan sp e e ds c a n b e u p d a te d e v e n if t h e msbs a r e lo ck e d . table 7. tem p e r ature data format for lo cal an d r e mote temp er ature high by te s temperature (c) digital output ?64 0000 0000 ?40 0001 1000 ?32 0010 0000 ?2 0011 1110 ?1 0011 1111 0 0100 0000 1 0100 0001 2 0100 0010 10 0100 1010 20 0101 0100 50 0111 0010 75 1000 1011 100 1010 0100 125 1011 1101 150 1101 0110 191 1111 1111 tab l e 8. local an d remote sen s or extend ed resolution extended re solution (c) temperature l o w bits 0.0000 00000 0.03125 00001 0.0625 00010 0.125 00100 0.250 01000 0.375 01100 0.500 10000 0.625 10100 0.750 11000 0.875 11100 te m p e r a t u r e (c) = ( msb ? 64c) + (ls b 0. 03125) ex a m p le : msb = 0101 0100 = 8 4 d ls b = 11100 = 14 te m p e r a t u r e c = (84 ? 64) + (2 8 0.03125) = 20.875 remote te mperature measurement the ad m1033 m e as ur es th e t e m p er a t ur e o f on e ext e r n al dio d e s e n s o r o r dio d e - co n n e c te d t r a n sisto r , w h ich is c o nn e c te d to p i n s 9 an d 10. th es e p i n s a r e de dic a t e d t e m p er a t ur e in p u t cha n n e ls. th e s e r i es r e sis t a n ce can c e l l a t i on (s rc) fe a t ur e c a n a u tom a t i c a l l y c a nc el out t h e e f f e c t of up to 1 k of re si st anc e i n s e ri e s w i th th e r e m o t e th e r m a l d i od e . the fo r w a r d v o l t a g e o f a dio d e o r dio d e-conn e c t e d t r a n sist o r , o p era t e d a t a con s t a n t c u r r en t, exhi b i ts a n e ga t i v e t e m p era t ur e co ef f i cien t o f a b o u t ?2 mv /c. u n fo r t una t e l y , t h e a b s o l u t e val u e o f v be va ries f r o m de vice t o de vice , and i n divid u al ca lib r a t ion is r e q u ir e d t o n u l l t h is o u t. t h er efo r e , t h e t e chniq u e is un su i t abl e for mass p r o d u c t i on. adm 1 0 3 3 2n3904 d+ 04937-0-026 d? adm 1 0 3 3 2n3906 d+ d? f i g ure 27. m e as uri ng t e mpe r at u r e u s ing d i s c rete t r ans i s t ors rev. 1 | page 16 of 39 | www.onsemi.com
adm1033 rev. 0 | page 17 of 40 d+ d? remote sensing t ransisto r in 1 u i n2 u i i bias v dd v out + to adc v out ? low-pass filter f c = 65khz 04937-0-027 f i g ure 28. a dm 1 03 3 s i g na l condit ion i ng the ad m1033 o p era t es a t thr e e dif f er en t c u r r en ts t o m e as ur e th e c h a n g e in v be . f i gu re 28 show s t h e i n put s i g n a l co nd i t i o n i ng u s e d to me a s u r e t h e output of an e x te r n a l te m p e r a t ur e s e ns or . i t a ls o show s t h e e x te r n a l s e ns or a s a su b s t r ate t r ans i stor , prov i d e d f o r t e m p era t ur e m o ni t o r i n g on s o me micr o p r o ces s o r s. th e ext e r n a l s e ns or work s e q u a l l y wel l a s a d i s c re te t r ans i stor . i f a dis c r e te t r an sisto r is us e d , t h e col le c to r is no t g r o u n d e d and s h o u ld b e li nk e d t o th e ba s e . i f a p n p tra n si s t o r i s used , th e b a se is co nne c t e d t o t h e d? i n p u t and t h e emi t t e r t o t h e d+ i n p u t. i f a n np n tra n si s t o r i s used , th e em i t t e r i s co nn ec t e d t o t h e d ? i n p u t a n d th e ba s e t o th e d + i n p u t . i f t h e s e n s o r is us e d in a v e r y no isy en vir o n m e n t, a ca p a c i t o r val u e o f u p t o 1000 pf ca n be place d betw e e n t h e d+ a nd d? in p u ts t o f i l t er t h e n o is e . h o w e v e r , addi tio n al p a rasi tic c a p a ci - t a nce o n t h e l i nes b e tw e e n d+, d?, a nd t h e t h e r ma l dio d e s h o u ld als o be c o n sider e d . the to tal ca p a c i tan c e s h o u ld ne v e r be g r ea t e r tha n 1000 pf . to m e a s u r e e a c h v be , t h e s e ns or i s s w itc h e d b e t w e e n op e r a t - in g c u r r en ts o f i, (n1 i), a n d ( n 2 i). th e r e su l t in g wa v e f o rm is p a s s ed t h r o ug h a 65 kh z lo w-p a s s f i l t er t o r e m o v e n o is e , t h en t o a ch op p e r - st ab i li z e d am plif ie r t h a t a m pl if ies a nd r e c t if ies t h e wa v e fo r m . this p r o d uces a dc vol t a g e p r o p o r t i onal t o ?v be . th e s e m e as ur em e n ts a r e us e d t o det e r m i n e t h e t e m p era t ur e of t h e t h er mal dio d e , w h i le a u t o ma t i cal l y com p ens a t i n g fo r a n y s e r i es r e sis t a n ce o n t h e d+ an d/ o r d? lin e s. th e t e m p era t ur e is store d i n two re g i ste r s as a 1 3 - bi t word. t o f u r t h e r r e d u ce t h e ef fe c t s o f n o is e , dig i t a l f i l t er in g is p e r - fo r m e d b y a v er ag in g t h e r e s u l t s o f 16 m e as ur e m en t c y cles a t co n v ersio n r a t e s o f les s t h a n 16 h z . a n ext e r n al t e m p era t ur e m e as ur e m en t t a k e s n o minal l y 32 m s w h e n a v er a g in g is enab le d a nd 6 m s w h en a v er a g i n g is dis a b le d . on e l s b o f th e ad c co r r es p o nds t o 0.03125c. the ad m1033 ca n t h e o r e t i cal l y m e as ur e t e m p era t ur es f r o m ? 64c t o +191.96875c, al th o u g h ?64c a nd +191c a r e o u tside i t s o p era t i n g ra n g e . the ext e n d e d tem p er a t ur e r e s o l u t i o n da t a fo r m a t is s h own in t a b l e 8. the ext e n d e d t e m p e r a t ur e r e s o l u tio n f o r th e lo c a l an d r e m o te c h a n ne ls is s t o r e d in t h e ext e n d ed t e m p era t ur e r e s o l u tion r e g i s t ers ( r eg. 0x40 = l o cal , reg. 0x42 = rem o te). table 9. tem p e r ature measurement registers register description default 0x40 local temperat ure, lsbs 0x00 0x41 local temperat ure, msbs 0x00 0x42 remote temperature, lsbs 0x00 0x43 remote temperature, msbs 0x00 h i g h an d lo w t e m p er a t ur e li mi t r e g i s t ers a r e as s o cia t e d wi t h e a ch t e m p er a t ur e m e as ur emen t cha n n e l . th e a p p r o p r i a t e s t a t us b i t is s e t w h en t h e hig h and lo w limi ts a r e exce e d e d . e x ce e d in g ei t h er limi t can ca us e an sm b a le r t in t e r r u p t. table 10. tem p erature meas urement limit registers register description default 0x0b local high limit 0x8b (75c) 0x0c local low limit 0x54 (20c) 0x0d local ther m limit 0x95 (85c) 0x0e remote high limit 0x8b (75c) 0x0f remote low limit 0x54 (20c) 0x10 remote ther m limit 0x95 (85c) rev. 1 | page 17 of 39 | www.onsemi.com
adm1033 rev. 0 | page 18 of 40 additional functions several other temperature measurement functions available on the adm1033 offer the systems designer added flexibility. turn-off averaging the adm1033 performs averaging at conversion rates of less than or equal to eight conversions per second. this means that the value in the measurement register is the average of 16 meas- urements. for faster measurements, set the conversion rate to 16 conversions per second or greater. (averaging is not carried out at these conversion rates.) or, to switch off averaging at the slower conversion rates, set bit 1 (avg) of configuration 1 register (address 0x01). single-channel adc conversions in normal operating mode, the adm1033 converts on both the local temperature and remote channels. however, the user can set the adm1033 to convert on one channel only. to enable single-channel mode, set the round robin bit (bit 7) in configuration register 2 (address 0x02) to 0. when the round robin bit equals 1, the adm1033 converts on both temperature channels. in single-channel mode, it converts on one channel only, to be determined by the state of the channel selector bit (bit 4) of configuration register 2 (address 0x02). table 11. channel selector bit 4 channel selector (configuration 2) 0 local channel (default) 1 remote channel removing temperature errors as cpus run faster and faster, it becomes more difficult to avoid high frequency clocks when routing the d+ and d? traces around a system board. even when recommended layout guidelines are followed, temperature errors attributed to noise coupled onto the d+ and d? lines remain. high frequency noise generally gives temperature measurements that are too high by a constant amount. the adm1033 has local and remote temperature offset registers at addresses 0x16 and 0x17?one for each channel. by completing a one-time calibration, the user can determine the offset caused by the system board noise and remove it using the offset registers. the registers automatically add a twos complement word to the remote temperature meas- urements, ensuring correct readings in the value registers. table 12. offset registers registration description default 0x16 local offset 0x00 0x17 remote offset 0x00 table 13. offset register values code offset value 0 0000 000 0c (default) 0 0000 001 0.125c 0 0000 111 0.875c 0 0001 111 1.875c 0 0111 111 7.875c 0 1111 111 15.875c 1 0000 000 ?16c 1 1111 000 ?0.875c rev. 1 | page 18 of 39 | www.onsemi.com
adm1033 rev. 0 | page 19 of 40 layout consi d era tions d i gi tal boa r d s ca n be e lectri c all y n o i s y e n vi r o nm en t s. b e s u r e t o p r o t e c t t h e a n a l og in p u ts f r o m n o is e , p a r t ic u la r ly w h e n m e as ur in g t h e ver y smal l v o l t a g es f r o m a r e m o te dio d e s e n s o r . t a ke t h e f o l low i n g pre c a u t i ons : x p l ace t h e ad m 1033 as c los e as p o s si b le t o t h e rem o t e s e n s in g dio d e . a dis t a n ce o f 4 in ch es t o 8 in ch es is a d eq ua t e , p r o v id ed tha t t h e w o r s t n o i s e so ur ce s s u c h a s clo c k gener a to r s, da t a / a ddr ess b u s e s, a nd cr t s a r e a v o i de d . x r o u t e th e d + a n d d ? tra c k s c l ose t o g e th e r , i n pa ralle l , w i t h g r ou nd e d g u ard t r a c k s on e a c h si d e . prov i d e a g r ou nd plan e u n der t h e t r acks if p o ssib le. x u s e wi de t r acks t o minim i ze i n d u c t an ce and r e d u ce n o is e p i ck u p . a min i m u m o f 5 mi l t r ack wid t h and sp acin g is r e co mme n d e d . x t r y t o minimize th e n u m b er o f co p p er/s older j o in ts, w h ic h ca n ca us e t h er m o cou p le ef fe c t s. w h er e co pp er / s o lder jo i n ts a r e used , m a k e s u r e th a t th ey a r e i n bo t h th e d + a n d d ? pa th a n d a t th e sa m e t e m p era t ur e . th e r m o co u p le ef f e c t s s h o u ld no t be a ma jo r p r ob lem be c a us e 1c co r r es p o n d s t o a b o u t 200 v , and th er m o co u p le v o l t a g es a r e a b o u t 3 v/ c o f t e m p era t u r e dif f er en ce . u n les s t h er e a r e tw o t h er m o co u p les w i t h a b i g t e m p era t ur e dif f er en t i al b e tw e e n t h em, t h er mo co u p le vol t a g es sh o u ld b e m u ch les s tha n 200 v . 5mil 5mil 5mil 5mil 5mil 5mil 5mil gnd d+ gnd d? 04937-0-028 f i gure 2 9 . a r r a ngem ent o f s i gnal t r acks x p lace a 0.1 f b y p a s s ca p a c i t o r c los e t o th e ad m1033. x i f th e dis t an ce to th e r e m o t e s e n s o r is m o r e than 8 in ch es, t w ist e d p a ir cable is r e co mmende d . t h is w o rks u p t o a b o u t 6 f e et t o 12 f e et. x f o r v e r y lo n g dis t an ces (u p t o 1 00 f e et), use s h ie lded twis t e d p a ir s u ch as b e lden #84 51 micr o p h o n e ca b le . c o nn e c t t h e t w i s te d p a ir to d+ a nd d? and t h e shield to gnd , c l os e t o th e ad m1033. l e a v e t h e r e m o te end o f th e sh i e ld u n c o n n e c te d to a v oi d g r ou nd l o op s. b e ca us e t h e m e as ur emen t t e chniq u e us es s w i t ch e d c u r r en t s o ur ces, exces si v e ca b l e and/o r f i l t er ca p a c i t a n c e can a f fe c t t h e m e as ur e m en t. w h en usin g lo ng ca b les, t h e f i l t er ca p a ci t o r c1 m a y b e re d u c e d or re move d. i n an y c a s e , t h e tot a l sh u n t ca p a c i tan c e sh ou ld nev e r excee d 1000 pf . noise filtering f o r t e m p e r a t ur e sen so r s o p e r a t in g in n o is y en vir o nm en ts , co m m on p r ac t i c e i s t o pla c e a c a p a c i to r acr o ss t h e d+ and d? p i n s t o he l p comb a t t h e ef fe c t s o f n o i s e . h o we v e r , l a rge c a p a c i t a n- ces a f fe c t t h e acc u rac y o f t h e t e m p er a t ur e me as ure m e n t, l e ading t o a rec o mmended maxim u m c a p a c i to r va l u e o f 1000 pf . w h ile th is ca pa ci t o r r e d u ce s t h e n o i se , i t does n o t e l im in a t e i t , mak i n g i t dif f ic u l t t o us e t h e s e n so r i n a ve r y no isy e n v i ro nme n t. the ad m1033 has a ma jo r adva n t a g e o v er o t her de vices w h en i t com e s t o e l imina t i n g t h e ef fe c t s o f n o is e on t h e ext e r n al s e n - s o r . th e s e r i es resis t a n ce cance l la t i on fe a t ur e al lo ws a f i l t er t o b e co n s t r uc t e d b e t w e e n t h e ext e r n al t e m p era t ur e s e n s o r an d t h e p a r t . th e ef fe c t o f a n y f i l t er r e s i s t a n ce s e en in s e r i e s wi t h t h e r e m o t e s e n s o r is a u t o ma tical l y ca n c e lled f r o m th e t e m p e r a t ur e r e s u l t . t h e co n str ucti o n o f a f i l t e r allo w s th e a d m1033 a n d t h e r e m o t e t e m p era t ur e s e n s o r t o op era t e in n o isy en vir o nm e n ts. f i gu re 30 shows a l o w-p a ss r - c - r f i l t e r wi t h t h e fol lowing val u es: r = 100 a nd c = 1 nf . this f i l t er in g r e d u ces bo t h co mm o n - m o d e n o is e an d dif f er en t i al n o is e . 04110-0-009 d+ 1nf 100 : remote t emperature sensor d? 100 : fi g ur e 3 0 . fi l t e r b e t w e e n r e m o t e s e ns o r a nd a dm 1 0 3 3 rev. 1 | page 19 of 39 | www.onsemi.com
adm1033 rev. 0 | page 20 of 40 limits, status registers, and interrupts high and low limits are associated with each measurement channel on the adm1033 and form the basis of system status monitoring. the user can set a status bit for any out-of-limit condition and detect it by polling the device. alternatively, smbusalert s can be generated to flag a processor or microcontroller of an out-of-limit condition. 8-bit limits table 14 and table 15 list all the 8-bit limits on the adm1033: table 14. temperature limit registers register description default 0x0b local high limit 0x8b (75c) 0x0c local low limit 0x54 (20c) 0x0d local therm limit 0x95 (85c) 0x0e remote high limit 0x8b (75c) 0x0f remote low limit 0x54 (20c) 0x10 remote therm limit 0x95 (85c) table 15. therm limit register register description default 0x19 therm % limit 0xff out-of-limit comparisons the adm1033 measures all parameters in a round-robin format and sets the appropriate status bit for out-of limit conditions. comparisons are made differently, depending on whether the measured value is compared to a high or low limit. high limit : comparison performed low limit : < comparison performed analog monitoring cycle time the analog monitoring cycle time begins on power-up or, if monitoring has been disabled, by writing a 1 to the monitor/ stby bit of configuration register 1 (address 0x01). the adc measures each one of the analog inputs in turn; as each measurement is completed, the result is automatically stored in the appropriate value register. the round-robin monitoring cycle continues, unless it is disabled. to disable the cycle, write a 0 to the monitor/stby bit (bit 0) of configuration register 1 (address 0x01). the adc performs round-robin conversions and takes 11 ms for the local temperature measurement and 32 ms for each remote temperature measurement with averaging enabled. the total monitoring cycle time for the average temperatures is, therefore, nominally 32 + 11 = 43 ms once the conversion time elapses, the round robin starts again. for more information, refer to the conversion rate register section. fan tach measurements take place in parallel and are not synchronized with the temperature measurements. status registers the results of limit comparisons are stored in the status registers. a 1 represents an out-of-limit measurement; a 0 represents an in-limit measurement. the status registers are located at addresses 0x4f to 0x51. if the measurement is outside its limits, the corresponding status register bit is set to 1. it remains set at 1 until the measurement falls back within its limits and either the status register is read or an ara is completed. to poll the state of the various measurements, read the status registers over the serial bus. if bit 0 ( alert low) of status register 3 (address 0x51) is set, this means the adm1033 has pulled the alert output low. pin 14 is an smbusalert output. this pin automatically notifies the system supervisor of an out-of-limit condition. reading the status register clears the status bit, as long as the error condition has been cleared. pin 3 is an alert comp output. this pin asserts low when ever an unmasked measurement goes outside its limit. unlike smbusalert , it automatically resets once the measurement falls back within the programmed limits. status register bits are sticky. whenever a status bit is set due to an out-of-limit condition, it remains set?even after the trigger- ing event has cleared. the only way to clear the status bit is to read the status register (after the triggering event has cleared). interrupt mask registers (reg. 0x08, reg. 0x09, reg. 0x0a) allow individual interrupt sources to be masked from causing an alert . if one of these masked interrupt sources goes out of limit, its associated status bit is set in the status register. rev. 1 | page 20 of 39 | www.onsemi.com
adm1033 rev. 0 | page 21 of 40 table 16. status register 1 (re g . 0x4f) bit no. name description 7 lh 1 = local high t e mperature limi t has been exceeded. 6 l l 1 = local low temperature limit has bee n exceeded. 5 rh 1= remote high temperature limit has been exc eeded. 4 rl 1 = remote low temperature lim i t has been exc eeded. 3 rd 1 = remote diode error; indicates an open or s h ort o n the d1+/d1? pins. 2 unused reserved. 1 unused reserved. 0 unused reserved. table 17. status register 2 (re g . 0x50) bit no. name description 7 lt 1 = local ther m temperature limit has been exc eeded. 6 rt 1 = remote ther m te mperature limit has been exc eeded. 5 unused reserved. 4 t% 1 = ther m timer limit has been exceeded. 3 ta 1 = one of the ther m limits has bee n exceeded; and the ther m output signal has bee n asserted. 2 ts 1 = ther m pin is active . clears on a read, if ther m is not active. 1 res reserved. 0 res reserved. table 18. status register 3 (re g . 0x51) bit no. name description 7 fs 1= fan has stalled. 6 fa 1= fan alarm s p eed, indicates fan is running at alar m speed. 5 res reserved. 4 res reserved. 3 res reserved. 2 res reserved. 1 res reserved. 0 alert 1= smbusaler t low, ind i cate s the adm1033 has pulled the smbusaler t line lo w. alert interrupt behavior the ad m1033 g e n e r a t e s an aler t to s i g n a l out - of - li m it co ndi t i on s. o u t - o f -lim i t con d i t i o n s can a ls o b e dete c t e d b y p o l l in g the s t a t us r e g i s t ers. th e ad m1033 has tw o aler t output s, ca l le d aler t co m p a n d sm b u sa le r t . in sm b u sa le r t m o de , th e o u t p u t r e m a i n s lo w un til th e fol l o w in g com b ina t ion o f co ndi t i o n s o c c u r : t h e m e a s ur e m en t falls ba c k wi th in i t s p r ogra m m e d li mi t s, a n d e i th e r th e s t a t us re g i ste r i s re a d or an a r a i s co m p le te d. in aler t c o m p m o d e , th e o u t p u t a u t o m a ti call y r e se t s o n ce t h e t e m p er a t ur e m e as ur e m en t fal l s b a ck w i t h in t h e p r o g ra mm e d li mi ts. fo r t h e sm b u sa le r t o u t p u t , a st a t us b i t is s e t w h en a m e as ur e m en t g o es o u tside i t s pr og ra mm e d li mi t. i f t h e co r r esp o n d in g mask b i t is n o t s e t, t h e sm b u sa le r t output i s p u ll ed l o w . i f th e m e a s ur ed val u e fall s ba c k w i t h i n t h e l i mi ts , th e sm b u sa le r t o u t p u t r e ma in s lo w un til t h e co r r es p o n d ing st a t us r e g i st er is r e ad o r un t i l an ar a is com p le t e d , as lo n g as no ot h e r me a s u r e m e n t i s out si d e it s l i m i t s. on th e o t h e r h a n d , th e aler t c o m p ou t p u t is a u t o ma tical l y p u ll ed l o w wh en a m e as ur em en t g o e s o u t sid e i t s p r ogra m m e d limi ts. o n c e t h e m e a s ur emen t f a l l s b a ck w i t h i n i t s limi ts, t h e aler t o u t p u t i s a u t o m a ti call y p u ll ed ba c k h i g h a ga i n , assumi n g n o o t h e r m e asur e m e n t cha n ne l is o u tside i t s limi ts. the ma i n dif f er en c e b e tw e e n t h e tw o o u t p u t s is t h a t t h e sm b u sa le r t do es n o t r e s e t wi t h o u t s o f t wa re in ter v en t i o n , w h i l e t h e aler t c o m p o u t p u t a u t o ma ti c a ll y r e se t s i t se lf . n o t e : i n th i s da ta s h e e t , a n aler t re f e r s to b o t h t h e aler t co m p a nd sm b u sa le r t , un le ss ot he r w is e st a t e d . a lert, 70 qc temperature limits time cleared on read alert comp smbusalert 04937-0-029 f i g u re 31. h o w aler t c o m p ar at o r and smbusalert ou t p ut s w o r k rev. 1 | page 21 of 39 | www.onsemi.com
adm1033 rev. 0 | page 22 of 40 handling smbusalert interrupts t o p r e v e n t t i e-ups d u e t o s e r v ic e in ter r u p ts, fol l o w t h es e st eps: 1. d e t e c t an s m bus ass e r t io n. 2. e n te r t h e i n te r r upt h a nd le r . 3. re ad t h e s t a t us r e g i s t er t o ide n t i f y t h e in t e r r u p t s o ur ce . 4. m a sk th e in t e rr u p t so u r c e b y set t i n g t h e a p p r o p ri a t e m a sk b i t in t h e in t e r r u p t mask r e g i sters (reg. 0x08 to reg. 0x0a). 5. t a k e t h e ap p r o p r i at e a c t i o n f o r a g i v e n i n t e r r u p t s o u r c e . 6. ex i t th e i n t e rr u p t h a n d le r . 7. p e r i o d ical l y p o l l t h e st a t us r e g i st er . i f t h e in t e r r u p t s t a t us b i t has cle a r e d , r e s e t t h e co r r esp o ndin g i n t e r r u p t mask b i t t o 0. this c a us es t h e sm b u sa le r t output a n d s t atu s bit s to b e h a ve a s s h ow n i n fi gu re 32 . temperature interrupt mask bit cleared (smbusalert rearmed) cleared on read (temp below limit) interrupt mask bit set high limit smbusalert "sticky" status bit temp back in limit (status bit stays set) 04937-0-030 f i g u re 32. h a ndl i n g smbusalert s interrupt masking register m a sk reg i s t ers 1, 2, a n d 3 a r e lo ca ted a t a ddr ess e s 0x08, 0x09, a nd 0x0a. th es e r e g i s t ers al lo w indivi d u al i n t e r r u p t s o ur ces t o b e mask e d o u t to p r e v en t t h e aler t i n te r r upt s. n o te t h a t mask i n g t h e i n ter r u p t s o ur ce p r e v en ts o n ly t h e aler t fr o m b e i n g as s e r t e d ; t h e a p p r o p r i a t e st a t us b i t is s e t as n o r m al . table 19. mask register 1 (re g . 0x08) bit no. name description 7 l h 1 masks the alert for the local high temperature. 6 l l 1 masks the alert for the local low temperature. 5 r h 1 masks the alert for the remote high temperature. 4 r l 1 masks the alert for the remote low temperature. 3 r d 1 masks the alert for the remote diode errors. 2 res reserved. 1 res reserved. 0 res reserved. table 20. mask register 2 (re g . 0x09) bit no. name description 7 res reserved. 6 res reserved. 5 res reserved. 4 t % 1 masks the alert for the ther m timer limit. 3 t a 1 masks the alert for the ther m limit being exce eded and the ther m output signal being asserted. 2 t s 1 masks the alert for a transition o n ther m ; has no effect on alert in alert comp mode. 1 res reserved. 0 res reserved. table 21. mask register 3 (re g . 0x0a) bit no. name description 7 fs 1 masks the alert for fan stalling. 6 fa 1 masks the alert for fan running at alarm speed. 5 res reserved. 4 res reserved. 3 res reserved. 2 res reserved. 1 res reserved. 0 res reserved. rev. 1 | page 22 of 39 | www.onsemi.com
adm1033 rev. 0 | page 23 of 40 fan_ faul t output the fa n _fa u l t o u t p u t sig n als wh e n t h e f a n s t al ls. p i n 8, a d u a l -f un c t io n pin, def a u l ts to a fa n _fa u l t output . i t ca n a ls o b e re c o n f i gu r e d a s an an a lo g i n put re f e re nc e f o r t h e therm in p u t. t o co nf ig ur e t h e p i n, s e t t h e fa n _fa u l t /ref b i t (bi t 7) in c o nf igura t ion reg i s t er 4 (a ddr es s 0x04) t o 1. fault queue the ad m1033 has a p r og ra mma b le fa u l t q u eue o p tio n tha t l e ts t h e us er p r og ra m t h e n u m b er of o u t-o f -limi t me as ur emen t s a l lo w a bl e b e fore ge ne r a t i ng an sm b u sa le r t . th e f a u l t q u eue a f fe c t s o n l y t e m p era t ur e me as u r em e n t cha n ne ls a nd is o p er a - t i on a l on ly i n sm b u sa le r t mo d e . i t p e r f or ms s o me s i m p le f i l t er in g, w h ich is p a r t ic u la r ly us ef u l a t t h e h i g h er co n v ersio n ra t e s (16, 32, a nd 64 con v ersio n s p e r s e con d ), w h er e a v era g in g is n o t ca r r i e d o u t. ther e is a q u eu e fo r e a ch o f t h e t e m p era t ur e cha nne ls. i f l (t h e val u e p r og ra mm e d t o t h e f a u l t q u eue) o r m o r e co n s e c u t i v e o u t - o f -limi t m e as urem e n ts a r e made o n t h e s a m e t e m p er a t ur e cha n n e l , t h e f a u l t q u eue f i l l s a nd t h e sm b u sa le r t output t r ig g e rs. t o f i l l t h e f a u l t q u eue , t h e us er n e e d s l o r m o r e c o ns e c ut iv e out - of - li m it me a s u r e m e n t s on t h e l o c a l, or l or more co n s e c ut i v e out - of - li m it me a s u r e m e n t s on t h e re mo te cha n n e l . the fa u l t q u eue is i n dep e n d e n t o f t h e s t a t e o f t h e b i ts in t h e st a t u s re g i ste r . table 22. fault queue (addres s 0x06) bits <3:0> fault que u e 000x 1 001x 2 01xx 3 1xxx 4 t o r e s e t t h e f a u l t q u eue , do o n e o f t h e fol lo w in g : x s m bus ar a comman d x read s t a t us reg i s t er 1 x po w e r - o n r e s e t the sm b u sa le r t c lea r s, ev e n i f th e co n d i t i o n th a t ca used t h e sm b u sa le r t re m a i n s. t h e sm b u sa le r t is r e ass e r t e d , if t h e fa u l t q u eue f i lls u p . conversion rate register the ad m1033 mak e s u p t o 64 m e as ur em en ts p e r s e con d . h o w e ver , fo r t h e s a k e o f r e d u ce d p o w e r co n s u m p t ion an d b e t t er n o is e imm u ni ty , us ers ca n r u n th e ad m1033 a t a s lo w er co n v ersio n r a t e . a v era g in g do es n o t o c c u r a t ra tes o f 16, 32, a n d 64 co n v ersio n s p e r s e con d . t a b l e 23 lis t s t h e a v ai la b l e r a t e s. th e co n v ersio n r a t e r e g i s t er is lo ca t e d a t a d dr es s 0x05. n o t e t h a t t h e c u r r en t r o un d-rob i n lo o p m u st b e com p lete d b e fo r e t h e n e w l y p r og ra mm e d con v ersio n r a t e can t a k e ef fe c t . table 23. co nversion rates code conversion rate 0x00 0.0625 0x01 0.125 0x02 0.25 0x03 0.5 0x04 1 0x05 2 0x06 4 0x07 8 0x08 16 0x09 32 0x0a 64 0x0b to 0xff reserved therm i/o timer and limits p i n 7 can be conf igur ed as ei t h er a n in p u t o r ou t p u t . a s a n o u t p u t , i t is as s e r t ed lo w t o sig n al tha t t h e m e asur ed t e m p era - t u r e has exce e d e d p r ep r o g r a m m e d t e m p er a t ur e limi ts. th e o u t p ut is a u t o ma t i cal l y p u l le d hig h a gain w h en t h e tem p era t ur e falls be lo w the ( therm ? h y s t er esis) li mi t. the val u e of h y s - t e r e sis is p r og ra mma b l e in reg i s t er 0x1a. therm is ena b le d a s a n o u t p u t b y defa u l t on p o w e r - u p . 04937-0-031 temperature limits time therm, 85 qc therm therm-hyst, 80 qc f i g u re 33. therm behavior rev. 1 | page 23 of 39 | www.onsemi.com
adm1033 rev. 0 | page 24 of 40 once the therm limits are exceeded, the fans are boosted to full speed?that is, as long as the boost disable bit (bit 1) is not set in configuration register 2 (address 0x02). to configure therm as an input, set the therm timer bit (bit 2) of configuration register 1 (address 0x01) to 1. (it no longer operates as an output.) the adm1033 can then detect whenever the therm input is asserted low. this can be con- nected to a trip point temperature sensor or to the prochot output of a cpu. with processor core voltages reducing all the time, the threshold for the adtl + prochot output also reduces as new processors become available. the default thresh- old on therm is the normal cmos threshold. however, pin 8 ( fan_fault /ref) can be reconfigured as a ref input. this is done by setting bit 7 ( fan_fault /ref) in configuration register 4 (address 0x04) to 1. the processor v ccp should be connected to this input to provide a reference for the therm input. the resulting therm threshold is 0.75 v ccp , the correct threshold for an agtl+ signal. the adm1033 can also measure assertion times on the therm input as a percentage of an on-time window. this window is programmable in configuration register 4 (address 0x04) using bits <6:4> ( therm % on-time window). values of between 0.25 and 8 are programmable. the assertion time, as a percentage of the time window, is stored in the therm % on-time register (address 0x4e). a therm % (0x19) limit is also associated with this register. once the measured percentage exceeds the percentage limit, the therm % exceeded bit (bit 4) in status register 2 (address 0x50) is asserted and an alert is generated, as long as the mask bit is not set. if the limit is set to 0x00, an alert is generated on the first assertion. if the limit is set to 0xff, an alert is never generated. this is because 0xff corresponds to the therm input, which is asserted all the time. table 24. therm % on-time window code therm % on-time window 000 0.25 s 001 0.5 s 010 1 s 011 2 100 4 s 101 8 s 110 8 s 111 8 s when therm is configured as an input only, set the enable therm events bits in configuration register 4 (address 0x04) to allow pin 7 to operate as an i/o. to configure the therm pin to be pulled low as an output whenever the local temperature exceeds the local therm limit, set the enable local therm events bit (bit 0) of configuration register 4 (address 0x04). to configure the therm pin to be pulled low as an output whenever the remote temperature exceeds the remote therm limit, set the enable remote therm events bit (bit 1) of configuration register 4 (address 0x04). therm % limit register the therm % limit is programmed to register 0x19. an alert is generated if the therm is asserted for longer than the programmed percentage limit. the limit is programmed as a percentage of the chosen time window. 0x00 = 0% 0xff = 100% therefore, 1 lsb = 0.39% example if a time window of 8 seconds is chosen, and an alert is to be generated if therm is asserted for more than 1 second, program the following value to the limit register: % limit = 1/8 100 = 12.5% 12.5% / 0.39% = 32d = 0x20 = 0010 0000 an alert is generated if the therm limit is exceeded after the time window has elapsed, assuming it is not masked. rev. 1 | page 24 of 39 | www.onsemi.com
adm1033 rev. 0 | page 25 of 40 fan dri v e signal the ad m1033 co n t r o ls th e sp e e d o f a co olin g f a n. v a r y in g t h e d u ty c y cle (o n/of f t i m e ) o f a s q u a r e wa ve a p plie d to t h e fa n va r i es th e sp ee d o f th e fa n. th e ad m1033 us es a co n t r o l m e th od ca l led s y n c h r o n o u s s p ee d co n t r o l , i n wh i c h th e p w m dr i v e sig n a l a p plie d to t h e fan is sy n c hr o n i z e d wi t h t h e fan ? s t a c h sig n al . s e e the s y n c hr ono u s s p e e d c o n t r o l s e c t io n. the ext e r n al cir c ui t r y r e q u ir e d t o dr i v e t h e fa n is sim p le . a sin g le n-ch a n nel mos f et is t h e on ly dr i v e de vice r e q u ir e d . the sp e c if ic a t ion s o f t h e mos f et dep e nd o n t h e m a xim u m c u r r en t r e q u ir e d b y t h e f a n and t h e ga t e v o l t a g e dr i v e (v gs < 3 v fo r dir e c t in t e r f acin g t o t h e dr iv e p i n). v gs ca n be g r ea t e r tha n 3 v , as long as t h e p u l l - u p on t h e ga t e is t i e d t o 5 v . the mos f e t s h o u ld als o ha ve a lo w o n r e sis t a n c e t o en s u r e t h a t t h er e is n o sig n if ica n t vol t age dr o p acr o ss t h e fet . a hig h o n r e sist an ce r e d u ces t h e v o l t a g e a p plie d acr o s s t h e f a n and , t h er efo r e , t h e m a x i m u m op e r a t i n g sp e e d of t h e fa n . f i gu re 3 4 show s a s c h e me fo r dr i v in g a 3 - wir e fan. 12v 12v fan 1n4148 q1 ndt3055l a d m 1033 dri ve t ach t ach 04937-0-032 3.3v 100k : 10k: 10k: 4.7k : 12v f i g u re 34. inte r f a c i ng a 3- wi r e f a n t o t he a dm 1 03 3 u s in g an n- channe l mosfe t f i gur e 34 us es a 10 k p u l l-u p r e sis t o r f o r th e t a ch sig n al . this ass u m e s tha t t h e t a c h sig n al is a n o p en c o l l ec t o r f r o m th e fan. i n al l cas e s, th e fan ? s t a ch sig n al m u st be k e p t b e lo w 5 v max i m u m to p r e v en t da ma g i n g t h e ad m103 3. i f i n dou b t a s to w h e t h e r a fa n h a s an op e n co l le c tor or tote m- p o le t a ch output , us e on e of t h e i n put s i g n a l c o n d i t i o n i n g cir c ui ts sh o w n i n t h e f a n i n p u t s s e c t io n. w h en desig n ing dr i v e cir c ui ts wi t h tra n sist o r s a nd fet s, ma k e s u r e t h a t t h e dr i v e p i n s a r e n o t r e q u ir e d t o s o ur ce c u r r en t a nd th a t t h ey si nk les s th a n t h e ma xi m u m curr e n t speci f i e d . synchr onous speed contr o l the ad m1033 dr i v es th e f a n u sin g a con t r o l s c h e m e cal led syn c hr o n o u s sp e e d con t r o l . i n t h is s c h e me , the pwm dr i v e sig n a l a p plie d to t h e fan is sy n c hr o n iz e d w i t h t h e t a ch sig n a l. a c c u r a te and r e p e a t ab le fan sp e e d m e a s ur em e n ts a r e t h e ma i n b e n e f i t s. t h e fan is a l lo w e d to r u n r e liab ly a t sp e e d s as lo w as 30 % o f th e f u l l ca p a b i li ty . the dr i v e sig n al a p plie d t o t h e f a n is sy n c hr o n i z e d wi t h t h e t a ch sig n al . th e ad m1033 s w i t ch es o n t h e dr i v e sig n al an d w a i t s f o r a tra n si ti o n o n t h e t a ch si gn al . w h en a tra n si ti o n t a k e s place on t h e t a ch sig n al, t h e p w m dr i ve is sw i t ch e d o f f fo r a p e r i o d o f t i me c a l le d t of f . the dr i v e sig n al is t h e n s w i t che d on ag ai n . t h e t of f tim e is va r i ed in o r der t o va r y th e fan sp ee d . i f th e fan r u n s to o fas t , the t of f ti m e i s in cr ea se d . i f th e fa n r u n s to o sl ow , t h e t of f tim e is decr eas e d . b e ca us e t h e dr iv e sig n al is sy n c hr o n ize d w i t h t h e t a ch sig n al, t h e f r e q ue n c y w i t h w h ich t h e f a n is dr i v en dep e n d s on t h e c u r - r e n t s p e e d o f t h e fa n and t h e n u m b er o f p o les in i t . f i gur e 35 s h o w s h o w the sy n c hro n o u s s p e e d dr i v e sig n al w o rks. the ide a l ta c h sig n al is the sig n al tha t w o u l d b e o u t p u t f r o m t h e fan, if p o w e r w e r e a p plie d 1 00% o f t h e t i m e . i t is r e p r es en t a - ti v e o f th e a c t u a l s p ee d o f th e fa n . th e a c t u al ta ch s i g n a l i s t h e sig n al s e en on t h e t a ch o u t p u t f r o m th e fan, if usin g a s c o p e . i n ef fe c t , t h e ac t u al t a ch sig n a l is t h e ide a l t a ch sig n al ch o p p e d w i t h t h e dr i v e sig n a l . i d ea l t a c h po l e t r a n si t i o n po i n t s das h = t ach f l o a t s h i g h b y pu l l -up re si st o r so l i d = t r u e t a c h w h en f a n i s po w er ed dr i ve a ct ua l t ach t off t pole 04937-0-033 f i g ure 35. d r ive sig nal by u s ing sy nch r on ous cont rol rev. 1 | page 25 of 39 | www.onsemi.com
adm1033 rev. 0 | page 26 of 40 fan in puts pin 2 is t h e t a ch in p u t i n te nde d fo r fa n sp e e d m e asur e m e n t. this i n p u t is op en- d ra in. s i g n al con d i t ionin g on the ad m1033 acco mmo d a t es t h e s lo w r i s e an d fa l l t i m e of t y pi c a l t a ch ome t e r output s. t h e m a x i m u m in p u t sig n a l ra nge is f r o m 0 v t o 5 v , e v en w h e n v cc is les s than 5 v . i f th es e in p u ts a r e s u p p lied f r o m fa n o u t p u t s tha t excee d 0 v to 5 v , ei t h e r r e sist i v e a tten u a t ion o f t h e f a n sig n a l o r dio d e c la m p i n g m u s t be use d t o k e e p th e fa n in p u ts wi th in a n accep t ab le ra n ge. f i gur e 36 t o f i gur e 38 s h o w exam p l es o f p o s si b l e fa n in p u t cir c ui ts. 5v or 12v fan drive x fan speed counter adm1033 tach x pull-up 4.7k : typ tach output v cc v cc 100k : typ 04937-0-035 zd1* *choose zd1 voltage approximately 0.8 u v cc f i gure 36. f a n w i th t a ch p u ll-up t o v o ltage > 5 v , c l amp e d with z e n e r d i ode i f th e fan o u t p u t has a r e sis t i v e p u l l-u p t o 12 v (o r a n o t h e r volt age g r e a te r t h an 5 v ) , t h e fa n output c a n b e cl am p e d w i t h a z e n e r dio d e, as sh own i n f i gur e 36. s e le c t a z e ner vol t a g e t h a t is g r e a t e r t h a n v ih b u t les s than 5 v , al lo win g fo r th e v o l t a g e t o lera n c e o f t h e z e n e r . a val u e of b e twe e n 3 v and 5 v is su i t abl e . 12v adm1033 fan speed counter fan(0? 7) pull-up typ <1 k : or totem pole tach output v cc * choose zd1 voltage approximately 0.8 u v cc zd1 zener* r1 10k : 04937-0-036 f i gure 37. f a n w i th str o ng t a c h p ull-u p to v o lt age > v cc or t o t e m p o le o u tput, cl am p e d wi th z e ner a n d res i st o r i f th e fan has a str o n g p u l l-u p (les s tha n 1 k t o 12 v) o r a to tem - p o le o u t p u t , t h e n a s e r i es r e sisto r ca n b e a dde d to limi t t h e z e n e r c u r r en t, as sh own i n f i gur e 37. or , r e sist i v e a t te n u a t io n can b e us e d , as sh o w n i n f i gur e 38. r1 an d r2 sh o u ld be ch os en s u c h tha t 2 v < v pull -up r2 /( r pull -up + r1 + r 2 ) < 5 v the fan in p u ts ha v e an in p u t r e sis t a n ce o f a b ou t 160 k t o g r o u n d . c o n sid er t h is w h en ca lc u la t ing r e sist o r va l u es. w i t h a pu l l - up vo lt age of 12 v an d pu l l- u p re si stor of l e ss t h an 1 k, s u i t ab le val u es f o r r1 a n d r2 w o u l d b e 10 0 k a nd 47 k . this g i v e s a hig h in p u t v o l t a g e o f 3.83 v . 12v fan speed counter adm1033 fan(0 ?7) <1 k : tach output v cc r1* r2 *see text 04937-0-037 f i gure 38. f a n w i th str o ng t a c h p ull-u p to v o lt age > v cc to t o t e m p o l e o u tput, a t t e n ua t ed wi th r 1 / r 2 fan speed measurement the fan co un ter do es n o t co un t t h e fan t a c h o u t p ut p u ls es dir e c t ly . this is b e ca us e t h e f a n ma y b e sp i nni ng a t less t h an 1,000 r p m a nd i t w o u l d ta k e s e veral s e con d s t o acc u m u l a t e a la rg e an d acc u r a t e co u n t. i n s t e a d , t h e p e r i o d o f t h e fan r e v o l u tio n is m e as ur ed b y ga ting a n o n -c hi p 81. 92 kh z o s c i l la t or i n to t h e i n put of a 16 - b it co u n te r f o r one co m p le te r e v o l u t i o n o f t h e fa n. th er efo r e , t h e acc u m u l a t e d co un t val u e is a c tu a l ly prop or t i on a l to t h e fa n t a cho m e t e r p e r i o d a n d i n ve r s el y prop or t i on a l to t h e fa n s p e e d. the n u m b er o f p o les in t h e fan m u s t b e p r og ra mme d in c o nf igura t io n reg i st er 3 (a ddr e s s 0x03). this n u m b er m u s t b e a n e v en n u m b e r o n l y , b e c a us e t h er e c a nn o t b e a n u n e v en n u m b er o f p o les in a f a n. a t a ch p e r i o d is o u t p u t f o r ev er y tw o p o les. th er efo r e , t h e n u m b er o f p o les m u s t b e k n o w n s o tha t t h e ad m1 033 ca n m e as ure f o r a f u l l r e v o l u tio n . f i gu re 39 shows t h e fa n sp e e d me a s u r e m e n t p e r i o d , assu m i ng tha t t h e fan o u t p u t s an ide a l t a ch sig n al . i n r e ali t y , the t a c h sig n a l o u t p ut b y t h e fan is ch o p p e d b y t h e dr i v e sig n a l . h o w e ve r , b e ca us e t h e dr i v e sig n al an d t a ch sig n al a r e s y n c hr oni z e d , th er e is en o u g h inf o r m a t io n a v aila b le f o r the ad m1033 t o m e as ur e t h e fan s p e e d acc u ra t e ly . cloc k i d ea l ta c h fa n mea su r emen t per i o d 04937-0-038 f i g ure 39. f a n spee d m e as u r e m ent f o r a 4- p o le f a n rev. 1 | page 26 of 39 | www.onsemi.com
adm1033 rev. 0 | page 27 of 40 fan speed measurement registers the16-bit measurements listed in table 25 are stored in the tach value registers. table 25. tach value registers register description default 0x4a tach period, lsb 0xff 0x4b tach period, msb 0xff reading fan speed reading back the fan speed involves a 2-register read for each measurement. the low byte should be read first. this freezes the high byte until both high and low byte registers have been read, preventing erroneous fan speed measurement readings. the fan tachometer reading registers report back the number of 12.20 s period clocks (81.92 khz oscillator) gated to the fan speed counter for one full rotation of the fan (assuming the correct number of poles is programmed). because the adm1033 essentially measures the fan tach period, the higher the count value, the slower the fan?s actual speed. a 16- bit fan tach reading of 0xffff indicates that the fan has stalled or is running very slowly (<75 rpm). calculating fan speed fan speed in rpm is calculated as follows. this calculation assumes the number of poles programmed in configuration register 3 (address 0x03) is correct for the fan used. fan speed ( rpm ) = (81920 60)/ fan tach reading where the fan tach reading is the 16-bit fan tachometer reading. example: tach high byte ( reg. 028) = 07 tach low byte ( reg. 029) = 0ff what is the fan speed in rpm? fan tach reading = 017ff = 6143d rpm = ( f 60)/ fan tach reading rpm = (81920 60)/6143 fan speed = 800 rpm alarm speed the fan alarm speed (bit 6) in status register 3 (address 0x51) is set whenever the fan runs at alarm speed. this occurs if the device is programmed to run the fan at full speed whenever the therm temperature limits are exceeded. the device runs at alarm speed, for example, if the boost disable bit (bit 1) of the configuration 2 register (address 0x02) is not set to 1. fan response register the adm1033 fan speed controller operates by reading the current fan speed, comparing it with the programmed fan speed, and then updating the drive signal applied to the fan. the fan response register determines the rate at which the adm1033 looks at and updates the drive signal. different fans have different inertias and respond to a changing drive signal more or less quickly than others. the fan?s response register allows the user to tailor the adm1033 to a particular fan, to prevent situations like overshoot. the user selects the number of updates to the drive signal per second. table 26 lists the available options. table 26. fan response codes code update rate 000 1.25 updates/s 001 2.5 updates/s = default 010 5 updates/s 011 10 updates/s 100 20 updates/s 101 40 updates/s 110 80 updates/s 111 160 updates/s table 27. fan response register (address 0x3c) bit function <7:3> unused <2:0> fan response rev. 1 | page 27 of 39 | www.onsemi.com
adm1033 rev. 0 | page 28 of 40 look-u p ta ble: modes of operat i o n the ad m1033 lo ok-u p tab l e has tw o m o des o f o p era t ion us ed t o det e r m i n e t h e b e ha vio r o f t h e sys t em: x ma nu a l m o d e x loo k -u p ta b le man ual mode i n man u al mo de , th e ad m103 3 is un der s o f t wa r e co n t r o l . th e so ft w a r e p r ogra m s th e r e q u i r ed fa n s p eed v a l u e o r ta r g e t r p m val u e . th e ad m1033 th en o u t p u t s tha t fa n s p eed . p r og r a mmi n g t a rget f a n s p e e d i n th i s m o de , th e use r p r ogra m s th e ta r g e t r p m a s a t a ch c o u n t f o r n p o l e s or a t a ch c o u n t f o r one f u l l rot a t i on of t h e fa n. this as s u mes tha t t h e n u m b er o f p o les is p r og ra mm ed co r r ec tl y in c o nf igura t io n 3 reg i s t er (a ddr e s s 0x03). f o l l o w t h es e st e p s t o p r og ra m t h e t a rg et fa n s p e e d : 1. p l ace t h e ad m 1033 in man u al m o de . s e t bi t 7 (t ab le/s w) o f c o nf igura t io n reg i s t er 1 (a ddr es s 0x01) = 0. 2. p r ogra m th e ta rg e t t a ch co un t (fa n spee d ) usi n g th e f o l l ow i n g e q u a t i on : ta c h c o u n t = ( f 60)/ r w h er e: f = c lo c k f r eq uen c y = 81.92 kh z r = r e q u ir e d r p m val u e ex a m p l e 1: i f t h e desir e d val u e is 5,000 r p m, p r og ra m th e fol l o w in g val u e t o t h e t a c h p u ls e p e r i o d r e g i s t ers: ta c h p u l s e p e r i o d = ( f 60)/5000 ta c h p u l s e p e r i o d = 983d = 0x 03d7 ex a m p l e 2: i f t h e desir e d val u e is 3,500 r p m, p r og ra m th e fol l o w in g val u e t o t h e t a c h p u ls e p e r i o d r e g i s t ers: ta c h p u l s e p e r i o d = ( f 60)/3500 ta c h p u l s e p e r i o d = 1404d = 0 x 057c table 28. registers to be prog rammed f a n d e s c r i p t i o n addres s v a l u e example 1 look-up table lsb 0x2a 0xd7 example 1 look-up table msb 0x2b 0x03 example 2 look-up table lsb 0x2c 0x7c example 2 look-up table msb 0x2d 0x05 look-u p ta ble the ad m1033 al lo ws th e us er t o p r og ra m a t e m p er a t ur e-t o - fa n- s p e e d p r o f i le . ther e a r e 24 r e g i s t ers i n t h e lo ok-u p t a b le , eig h t fo r t e m p er a t ur e and 16 fo r t a rg et fa n sp e e d (e ach t a rg et fa n s p e e d is tw o r e g i s t ers). i n t o t a l , t h er e a r e e i g h t a v a i lab le po i n t s. ther e a r e tw o op t i o n s w h e n p r og ra mmin g t h e lo ok-u p t a b l e . i t ca n b e p r o g r a mm e d to ma k e t h e fa n r u n a t dis c r e te sp e e ds an d j u m p t o t h e ne w s p e e d on ce t h e t e m p era t ur e t h r e s h old is cr os s e d . or , i t c a n lin e a r l y ra m p th e t a c h coun t betw een t h e tw o t e m p er a t ure t h r e s h olds. f i gur e 40 a nd f i gur e 41 s h o w w h a t t h e lo ok-u p ta b l e lo oks li k e , if al l eig h t p o in t s a r e us e d o n t h e o n e c u r v e fo r b o t h f a n s . f i gur e 40 s h o w s t h e t r a n sfer c u r v e w h en t h e fa n is p r og ra mm e d t o r u n a t dis c r e te s p ee ds. th e ad m1033 s p in s t h e fan a t i t s n e w sp e e d onc e a t h re shol d is cr o s s e d. tach count 8 fan speed t1 t2 t3 t4 t5 t6 t7 t8 temperature tach count 7 tach count 6 tach count 5 tach count 4 tach count 3 tach count 2 tach count 1 04937-0-039 f i gure 40. p r ogr a mming the l o ok-up t a ble in d i s c ret e r p m mode f i gur e 41 s h o w s th e tra n sf e r cur v e i f th e lin e a r fa n s p eed s o p t i o n i s ch os en. a t t e m p e r a t ur e t1, t h e fa n r u n s a t f a n s p e e d 1. a s t h e t e m p era t ur e in cr e a s e s, t h e fa n sp e e d i n cre a s e s un t i l i t r e ach e s f a n s p e e d 2 a t t2. tach count 8 fan speed t1 t2 t3 t4 t5 t6 t7 t8 temperature tach count 7 tach count 6 tach count 5 tach count 4 tach count 3 tach count 2 tach count 1 04937-0-040 f i gure 41. p r ogr a mming the l o ok-up t a ble in lin e ar f a n sp eeds m o de rev. 1 | page 28 of 39 | www.onsemi.com
adm1033 rev. 0 | page 29 of 40 fan speed t1 t2 t (3 to 8) = 191 qc temperature tach count 2 to 8 tach count 1 04918-0-041 f i g ure 42. p r og r a m m ing t w o p o int s o n t he l o ok -u p t a b l e once t h e t e mp e r ature excee d s t h e highest t e mp erature poi n t i n the look- u p tabl e, the f a n sp ee d remains at t h e highes t spee d until th e te mpe r ature drops bel o w the t7 te mp erature v a lue. if the te mper at ures in t1 to t8 are not programmed in succession, the fan spe e d move s to the next hig h est pro- gram me d te mp erature as th e te mp erat ure i n creases. s i milarly, whe n t h e te mpe r ature decre a ses , it ig nores programmed hig h er temper atures a nd jumps to th e next lower t e mperature. there - fore, the te mper ature- to-fa n -sp eed profile for i n creas i ng and decr eas i ng te m p er atur e ca n b e differ e nt. w h en p r og ra mmin g t h e lo ok-up t a b le , t h e us er has t h e o p t i o n t o us e b e tw e e n t w o a nd eig h t p o in ts fo r t h e fa n ( e ig h t p o in ts o n l y if th e s a m e c u r v e is t o be us ed f o r bo t h fa ns). i f t h e us er wan t s t o p r og ra m o n l y t h e t r a n sfer c u r v e a n d k n o w s t h e st a r t i n g te m p era t ur e, mini m u m fa n sp e e d , max i m u m tem p era t ur e, and max i m u m fan sp e e d , t h e n o n ly fo ur p a ra m e - ters a r e r e q u ir e d : t1, t2, f s 1, and f s 2. the r e ma ini n g lo ok-up t e m p era t ur e t h r e s h olds sh o u ld r e ma in a t t h eir defa u l t v a l u es of +191c. fs 3 t o fs8 s h o u ld be p r og ra mm ed wi t h the s a m e va l u e as fs2 t o g i v e the f la t c u r v e , if r e q u ir ed , o r , they ca n be lef t a t t h e def a u l t val u e o f 0. h o w e v e r , i t is no r m al t o p r og ra m a therm limi t as w e l l . on ce t h is t e m p era t ur e is exce e d e d and t h e b o os t b i t i s s e t, t h e fa n r u n s t o f u l l s p eed . this o v er r i des th e tab le . table 29. l ook -up tabl e regi ster addresses x temperature, x rpmx, lsb rpmx, msb 1 0x22 0x2a 0x2b 2 0x23 0x2c 0x2d 3 0x24 0x2e 0x2f 4 0x25 0x30 0x31 5 0x26 0x32 0x33 6 0x27 0x34 0x35 7 0x28 0x36 0x37 8 0x29 0x38 0x39 setti ng up the loo k -u p table in linear m o de w h en discr e t e /lin e a r s p ee d (b i t 2) is set t o 1 (defa u l t ), the t a c h co un t de cr e a s e s line a r ly a nd t h e fan sp e e d i n cr e a s e s w i t h t e m p era t ur e . a t t e m p era t ur e t x , t h e fa n r u n s a t f s x a n d sp e e d in cr e a s e s w i t h tem p er a t ur e t o fs x+1 a t t e m p era t ur e t x+1 . a l ter n a t i v ely , t h e fa n c a n b e r u n a t dis c r e te fan sp e e d s. w h e n d i scr e t e / l in ea r s p eed (bi t 2) i s s e t t o 0, th e fa n r u n s a t a n e w s p e e d on ce t h e tem p er a t ur e t h r e s h old is exce e d e d . selecting which temperature channel contr o ls a fa n f a n b e ha vio r reg i s t er (a ddr e s s 0x07) bi ts <1:0 > = d r ive b e ha vio r the ad m1033 ca n be conf igur ed s o tha t ei t h er th e lo ca l t e m p era t ur e o r t h e r e m o te t e m p era t ur e co n t r o ls t h e fan. i n def a u l t, t h e rem o t e t e m p er a t ur e co n t r o ls t h e fa n. table 30. driv e bhvr bits bits d riv e x bhv r 00 local t e mperat ure controls the fan 01 remote temperature controls the fan 10 remote temperature controls the fan 11 fan runs at full speed look-up table hysteresis the us er can p r og ra m a h y st er esis t o b e a p plie d t o t h e lo ok-u p t a b le . th e ad van t a g e o f t h is is a p p a r e n t , if t h e tem p er a t ur e is c y clin g a r o u n d o n e o f t h e t h r e sh old t e m p era t u r es, p a r t ic u la r l y w h en t h e lo ok- u p t a b l e is co nf i gur e d in dis c r e te m o de . i t is n o t as im p o r t a n t in lin e a r m o de . table 31. prog ramming the hysteresis code hysteres is va lue 0000 0000 0c 0000 0001 1c 0000 0010 2c 0000 0101 5c 0000 1000 8c 0000 1111 15c the h y s t er esis r e g i s t er o f t h e lo ok-u p t a b l e is a t a ddr es s 0x3a. a h y s t er esis val u e o f b e twe e n 0 c an d 15 c can b e p r o g r a mm e d w i t h a r e s o l u t i on o f 1c a nd a p pl ie d to a l l t h e t e m p era t ur e t h r e s h olds. t a b l e 3 1 g i v e s s a m p le v a l u es fo r p r o g ra mmin g. rev. 1 | page 29 of 39 | www.onsemi.com
adm1033 rev. 0 | page 30 of 40 programming the therm limit for temperature channe ls therm is t h e a b s o l u te max i m u m te m p era t ur e a l lo w e d o n a t e m p era t ur e cha nne l . a b o v e t h is t e m p era t ur e , a co m p on e n t s u ch as t h e cp u o r vrm mig h t o p er a t e b e yo nd i t s s a fe o p era t i n g limi t. w h en t h e t e m p era t ur e exce e d s therm , a l l fa n s a r e dr i v en a t f u l l s p e e d t o p r o v i d e cr i t ical syst e m co oling. th e fa n s r e ma in r u nnin g a t 100% u n til t h e t e m p era t ur e dr o p s b e lo w therm ? h y s t er esis. th e h y s t er esis val u e ca n b e p r o- g r a m m e d; i t s defa u l t is 5c. i f th e bo os t dis a b le b i t (bi t 1) is s e t in c o nf igura t ion r e g i st er 2, t h e fa n s do n o t r u n t o f u l l sp e e d . the therm limi t is con sider e d t h e m a xim u m w o rst-c a s e o p era t i n g t e m p era t ur e o f t h e sys t em. e x ce e d in g a n y therm li m i t r u ns a l l fa ns a t f u l l s p e e d, a co nd i t i o n w i t h ve r y ne ga t i ve aco u st ic ef fe c t s. this lim i t sh o u l d b e s e t u p as a fa i l-s a f e and n o t e x ceed ed un d e r n o rm al s y s t em o p e r a t in g co n d i t i o n s. th e therm t e m p era t ur e li mi t r e g i st ers a r e lis t e d i n t a b le 32. table 32. therm hyst eresis registers addres s d e s c r i p t i o n defau l t 0x0d local ther m limit 0x95 (85c) 0x10 remote ther m limit 0x95 (85c) the therm h y s t er esis r e g i s t er is a t a ddr es s 0x1a. a val u e is p r o g r a mm e d and a p pli e d to b o t h te m p er a t ur e cha n n e ls?lo c a l a nd r e m o te. a therm h y s t er esis val u e o f b e twe e n 0 c a nd 15c can be p r og ra mm e d wi t h a r e s o l u tio n o f 1c. s e e t a b l e 3 3 . table 33. prog ramming therm hysteresis code hysteres is va lue 0000 0000 0c 0000 0001 1c 0000 0010 2c 0000 0101 5c 0000 1000 8c 0000 1111 15c xor tree test mode the ad m1033 in c l udes a n x or tr ee t e s t mo de . this m o de is us ef u l fo r in-cir c u i t t e st e q ui p m e n t a t b o a r d - le v e l t e st i n g. b y a p p l yin g s t im u l us t o th e p i n s in c l ude d in t h e x o r t e s t , i t i s p o ss ibl e to d e te c t op e n s or s h or t s on t h e sy ste m b o ar d. f i gur e 43 s h o w s t h e sig n als exer cis e d i n t h is m o de . fan_fault/ref tach1 alert_comp therm alert location drive1 04937-0-042 f i g u re 43. x o r t r ee t e s t lock bit s e t t in g t h e lo ck b i t (bi t 6) o f c o nf igur a t io n reg i ster 1 (a ddr ess 0x01) mak e s al l th e lo cka b le r e g i s t ers r e ad-onl y . th es e r e g i s t ers r e ma in r e ad o n ly un til the ad m1033 is p o w e r e d do wn and b a ck u p a ga i n. f o r m o r e info r m a t io n on w h ich r e g i st ers a r e lo c k a b le , s e e t a b l e 33. sw reset s e t t in g th e so f t w a r e r e set b i t (b i t 0) o f c o n f i g u r a t i o n regi s t e r 1 (a ddr es s 0x01) r e s e ts al l s o f t w a r e -r es et t a b l e b i t s t o t h eir def a u l t va l u e . f o r m o r e info r m a t io n on r e s e t t in g reg i st e r s a n d t h e i r defa u l t v a l u es, s e e t a b l e 34 t o t a b l e 68. rev. 1 | page 30 of 39 | www.onsemi.com
adm1033 rev. 0 | page 31 of 40 table 34. adm1033 registers address r/w description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 default lockable 0x00/80 r/w #bytes/block read 7 6 5 4 3 2 1 0 0x20 y 0x01/81 r/w configuration 1 table/sw lock sda scl alert timer avg mon 0x01 y 0x02/82 r/w configuration 2 rr re s res cs lut d/l bd reset 0x84 y 0x03/83 r/w configuration 3 res res res res #fp #fp #fp #fp 0x44 y 0x04/84 r/w configuration 4 ff/ref %t %t %t xor res rtm ltm 0x00 y 0x05/85 r/w conversion rate res re s res res conv conv conv conv 0x07 y 0x06/86 r/w fault queue res f1 off res res fq fq fq fq 0x01 y 0x07/87 r/w fan behavior res res res res res res db db 0x09 y 0x08/88 r/w mask 1 lh ll rh rl rd res res res 0x52 n 0x09/89 r/w mask 2 res res res %t ta ts res res 0x10 n 0x0a/8a r/w mask 3 fs fa res res res res res res 0x00 n 0x0b/8b r/w local high limit 7 6 5 4 3 2 1 0 0x8b n 0x0c/8c r/w local low limit 7 6 5 4 3 2 1 0 0x54 n 0x0d/8d r/w local therm limit 7 6 5 4 3 2 1 0 0x95 y 0x0e/8e r/w remote high limit 7 6 5 4 3 2 1 0 0x8b n 0x0f/8f r/w remote low limit 7 6 5 4 3 2 1 0 0x54 n 0x10/90 r/w remote therm limit 7 6 5 4 3 2 1 0 0x95 y 0x16/96 r/w local offset 7 6 5 4 3 2 1 0 0x00 y 0x17/97 r/w remote offset 7 6 5 4 3 2 1 0 0x00 y 0x19/99 r/w therm % limit 7 6 5 4 3 2 1 0 0x00 y 0x1a/9a r/w therm hysteresis res res res res hys hys hys hys 0x05 n 0x22/a2 r/w look-up table t1 7 6 5 4 3 2 1 0 0xff y 0x23/a3 r/w look-up table t2 7 6 5 4 3 2 1 0 0xff y 0x24/a4 r/w look-up table t3 7 6 5 4 3 2 1 0 0xff y 0x25/a5 r/w look-up table t4 7 6 5 4 3 2 1 0 0xff y 0x26/a6 r/w look-up table t5 7 6 5 4 3 2 1 0 0xff y 0x27/a7 r/w look-up table t6 7 6 5 4 3 2 1 0 0xff y 0x28/a8 r/w look-up table t7 7 6 5 4 3 2 1 0 0xff y 0x29/a9 r/w look-up table t8 7 6 5 4 3 2 1 0 0xff y 0x2a/aa r/w look-up table, fs1 7 6 5 4 3 2 1 0 0xff y 0x2b/ab r/w look-up table, fs1 15 14 13 12 11 10 9 8 0xff y 0x2c/ac r/w look-up table, fs2 7 6 5 4 3 2 1 0 0xff y 0x2d/ad r/w look-up table, fs2 15 14 13 12 11 10 9 8 0xff y 0x2e/ae r/w look-up table, fs3 7 6 5 4 3 2 1 0 0xff y 0x2f/af r/w look-up table, fs3 15 14 13 12 11 10 9 8 0xff y 0x30/b0 r/w look-up table, fs4 7 6 5 4 3 2 1 0 0xff y 0x31/b1 r/w look-up table, fs4 15 14 13 12 11 10 9 8 0xff y 0x32/b2 r/w look-up table, fs5 7 6 5 4 3 2 1 0 0xff y 0x33/b3 r/w look-up table, fs5 15 14 13 12 11 10 9 8 0xff y 0x34/b4 r/w look-up table, fs6 7 6 5 4 3 2 1 0 0xff y 0x35/b5 r/w look-up table, fs6 15 14 13 12 11 10 9 8 0xff y 0x36/b6 r/w look-up table, fs7 7 6 5 4 3 2 1 0 0xff y 0x37/b7 r/w look-up table, fs7 15 14 13 12 11 10 9 8 0xff y 0x38/b8 r/w look-up table, fs8 7 6 5 4 3 2 1 0 0xff y 0x39/b9 r/w look-up table, fs8 15 14 13 12 11 10 9 8 0xff y 0x3a/ba r/w look-up table hysteresis res res res res hys hys hys hys 0x00 y 0x3c/bc r/w fan response res res res res res fr fr fr 0x00 y 0x3d\bd r device id 7 6 5 4 3 2 1 0 0x33 n 0x3e\be r company id 7 6 5 4 3 2 1 0 0x41 n rev. 1 | page 31 of 39 | www.onsemi.com
adm1033 rev. 0 | page 32 of 40 address r/w description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 default lockable 0x3f\bf r revision register 7 6 5 4 3 2 1 0 0x02 n 0x40\c0 r local temperature 4 3 2 1 0 res res res 0x00 n 0x41\c1 r local temperature 12 11 10 9 8 7 6 5 0x00 n 0x42\c2 r remote temperature 4 3 2 1 0 res res res 0x00 n 0x43\c3 r remote temperature 12 11 10 9 8 7 6 5 0x00 n 0x4a\ca r tach period 7 6 5 4 3 2 1 0 0xff n 0x4b\cb r tach period 15 14 13 12 11 10 9 8 0xff n 0x4e\ce r therm % on-time 7 6 5 4 3 2 1 0 0x00 n 0x4f\cf r status 1 lh ll rh rl rth res res res 0x00 n 0x50\d0 r status 2 lt rt res %t ta ts res res 0x00 n 0x51\d1 r status 3 fs fa res res res res res alert 0x00 n table 35. register 0x00, # bytes/block read, power-on reset = 0x20, lock = y, s/w reset = y bit name r/w description <7:0> # bytes block read r/w block reads are # bytes/block read long. the maximum is 32 bytes, the smbus transaction limit. table 36. register 0x01, configuration register 1, power-on default = 0x01, lock = y, sw reset = y bit name r/w description 7 sw con r/w set to 1 to have look-up table control the fan sp eed. set to 0 to put adm1033 in software/manual control mode. default = 0. 6 lock bit r/w set to 1 to prevent the user from writing to the adm1033 registers. 1 = adm1033 registers locked. 0 = adm1033 registers unlocked. default = 0. 5 sda timeout r/w 1 = sda timeout enabled. 0 = sda timeout disabled. default = 0. 4 scl timeout r/w 1 = scl timeout enabled. 0 = sdl timeout disabled. default = 0. 3 reserved r/w reserved. 2 enable therm timer r/w 1 = timer enabled, 0 = timer disabled. enables therm as an input. default = 0. 1 averaging off r/w disables averaging at the slower conversion rate s (8 hz and slower). averaging is automatically disabled at the higher (16, 32, and 64) con version rates. default = averaging on = 0. 0 monitor/stby r/w set to 1 to enable monitoring of temperature. set to 0 to disable temp erature monitoring. power- on default = 1. table 37. register 0x02, configuration register 2, power-on default = 0x84, lock = y, sw reset = y bit name r/w description 7 round robin r/w enables round-robin mode. set to 0 for single-c hannel mode. (the adc converts on only one channel, which is determined by the channel selector bits.) default = round robin = 1. <6:5> reserved r/w reserved. 4 channel selector r/w 0 = local temperature me asurements, 1 = remote te mperature measurements. 3 reserved r/w reserved. 2 discrete/linear rpm r/w determines whether the fans run at discrete speeds or whether the fan speed increases with temperature between the two thre sholds. default = 1 = linear. 1 boost disable r/w set to 1 to prevent fans from being boosted, if either therm temperature or therm timer limits are exceeded. under these conditions, the fans run at the previously calculated speed. default = 0. 0 sw reset r/w set this bit to 1 to reset the adm1033 registers to their default values, exclud ing the limit registers, offset registers, and look-up table registers. this bit self-clears. default = 0. table 38. register 0x03, configuration register 3, power-on default = 0x44, lock = y, sw reset = y bit name r/w description <7:4> unused r/w reserved. <3:0> #poles fan r/w write the number of poles in the fan to this re gister. power-on default = 4 poles = 100. this value should be an even number only. rev. 1 | page 32 of 39 | www.onsemi.com
adm1033 rev. 0 | page 33 of 40 table 39. register 0x04, configuration register 4, power-on default = 0x00, lock = y, sw reset = y bit name r/w description 7 fan_fault ref r/w sets the function for pin 8. 0 = default = fan _ fault output ( therm input is cmos). 1 = reference input for therm . <6:4> therm % time window r/w these bits set the time window over which therm % is calculated. 000 = 0.25 s 001 = 0.5 s 010 = 1 s 011 = 2 s 100 = 4 s 101 = 8 s 110 = 8 s 111 = 8 s 3 xor test r/w set this bit to 1 to enable the xor connectivity test. 2 unused r/w reserved. 1 enable remote therm events r/w this bit enables therm assertions as an outp ut. functions when the therm timer is enabled and the remote temperature exceeds its therm limit. 0 enable local therm events r/w this bit enables therm assertions as an outp ut. functions when the therm timer is enabled and the local temperature exceeds its therm limit. table 40. register 0x05, conversion rate register, power-on default = 0x0a, lock = y, sw reset = y bit name r/w description 7 reserved r/w reserved. do not write a 1 to this bit. <6:4> unused r reserved. <3:0> conversion rate r/w these 4 bits set the conversion rates of the adm1033. changing these bits does not update the conversion rate until th e start of the next round robin. 0000 = 0.0625 conversions/s 0001 = 0.125 conversions/s 0010 = 0.25 conversions/s 0011 = 0.5 conversions/s 0100 = 1 conversion/s 0101 = 2 conversions/s 0110 = 4 conversions/s 0111 = 8 conversions/s 1000 = 16 conversions/s 1001 = 32 conversions/s 1010 = 64 conversions/s table 41. register 0x06, fault queue, power-on default = 0x01, lock = y, sw reset = y bit name r/w description <7:4> unused r reserved. <3:0> fault queue length r/w these 4 bits set the fault queue (the nu mber of out-of-limit measurements made before an alert is generated). 000x = 1 001x = 2 01xx = 3 1xxx = 4 rev. 1 | page 33 of 39 | www.onsemi.com
adm1033 rev. 0 | page 34 of 40 table 42. register 0x07, fan bhvr register, powe r-on default = 0x09, lock = y, sw reset = y bit name r/w description 7 reserved r reserved. 6 fan off r/w when this bit is set to 1, the fan switc hes off, regardless of programmed target fan speed. default = 0. <5:2> reserved r reserved. <1:0> drive bhvr r/w determine which temperature source controls the drive output. 00 = local temp controls the drive. 01 = remote temperature controls the drive. 10 = remote temperature controls the drive. 11 = drive at full speed. table 43. register 0x08, mask register 1, powe r-on default = 0x52, lock = n, sw reset = y bit name r/w description 7 local temp high r/w a 1 disables the corresponding interrupt status bit from causing the interrupt output to be set. the status bit is not affected. default = 0. 6 local temp low r/w a 1 disables the corresponding interrupt status bit from causing the interrupt output to be set. the status bit is not affected. default = 1. 5 remote high r/w a 1 disables the corresponding interrupt status bit from causing the interrupt output to be set. the status bit is not affected. default = 0. 4 remote low r a 1 disables the corresponding interrupt status bit from causing the interrupt output to be set. the status bi t is not affected. default = 1. 3 remote diode error r a 1 disables the corresponding interrupt status bit from causing the interrupt output to be set. the status bit is not affected. default = 0. 2 unused r reserved. 1 unused r reserved. 0 unused r reserved. table 44. register 0x09, mask register 2, powe r-on default = 0x10, lock = n, sw reset = y bit name r/w description <7:5> unused r unused. 4 therm % r/w a 1 disables the corresponding interrupt status bit from setting the interrupt output. the status bit is not affected. default = 0. 3 therm assert r/w a 1 disables the corresponding interrupt status bit from setting the interrupt output. the status bit is not affected. default = 0. 2 therm _state r/w a 1 disables the corresponding interrupt status bit from setting the interrupt output. the status bit is no t affected. default = 0. this bit has no effect for the alert comp output. <1:0> unused r unused. table 45. register 0x0a, mask register 3, powe r-on default = 0x00, lock = n, sw reset = y bit name r/w description 7 fan stalled r/w a 1 disables the corresponding interrupt status bit from setting the interrupt output. the status bit is no t affected. default = 0. 6 fan alarm speed r/w a 1 disables the corresponding interrupt status bit from setting the interrupt output. the status bit is no t affected. default = 0. 5 reserved r reserved. default = 0. 4 reserved r reserved. default = 0. 3 reserved r reserved. default = 0. 2 reserved r reserved. default = 0. 1 reserved r reserved. default = 0. 0 reserved r reserved. default = 0. rev. 1 | page 34 of 39 | www.onsemi.com
adm1033 rev. 0 | page 35 of 40 table 46. register 0x0b, local high limit, powe r-on default = 0x8b, lock = n, sw reset = n bit name r/w description <7:0> local high limit r/w when the local temperature exceeds this point, the corresponding interrupt status bit is set. table 47. register 0x0c, local low limit, powe r-on default = 0x54, clock = n, sw reset = n bit name r/w description <7:0> local low limit r/w when the local temperature falls below this point, the corresponding interrupt status bit is set. table 48. register 0x0d, local therm limit, power-on default = 0x95, lock = y, sw reset = n bit name r/w description <7:0> local therm limit r/w when the local temperature exceeds this poi nt, the corresponding status bit is set and the therm output is activated. table 49. register 0x0e, remote high limit, po wer-on default = 0x8b, lock = n, sw reset = n bit name r/w description <7:0> remote high limit r/w when the remote temperature exceeds this point, the corresponding interrupt status bit is set. table 50. register 0x0f, remote low limit, power-on default = 0x54, lock = n, sw reset = n bit name r/w description <7:0> remote low limit r/w when the remote temperature falls below th is point, the corresponding interrupt status bit is set. table 51. register 0x10, remote therm limit, power-on default = 0x95, lock = y, sw reset = n bit name r/w description <7:0> remote therm limit r/w when the temperature exceeds this point, th e corresponding status bit is set and the therm output is activated. table 52. register 0x16, local offset register, po wer-on default = 0x00, lock = y, sw reset = n bit name r/w description <7:0> local offset r/w allows a twos complement o ffset to be automatically a dded to or subtracted from the local temperature measurement. resolution = 0.125c. maximum offset = ? 16c to +15.875c. default = 0. table 53. register 0x17, remote offset register, power-on default = 0x00, lock = y, sw reset = n bit name r/w description <7:0> remote offset r/w allows a twos complement o ffset to be automatically a dded to or subtracted from the remote temperature measurement. re solution = 0.125c. maximum offset = ? 16c to +15.875c. default = 0. table 54. register 0x19, therm timer % limit, power-on default = 0xff, lock = y, sw reset = n bit name r/w description <7:0> therm timer on % limit r/w if the therm is asserted for greater than or equal to the therm timer on % limit of the time window, then the corresponding status bit is set. rev. 1 | page 35 of 39 | www.onsemi.com
adm1033 rev. 0 | page 36 of 40 table 55. register 0x1a, therm hysteresis, power-on default = 0x05, lock = y, sw reset = n bit name r/w description <7:4> reserved r reserved. <3:0> therm hysteresis r/w an unsigned therm hysteresis value, lsb = 1c. once therm has been activated on a temperature channel, if the temperature drops below the therm limit ? hysteresis, the therm is deactivated. table 56. look-up table registers, lock = y, sw reset = y register address r/w description power-on default 0x22 r/w look-up table, t1 0xff 0x23 r/w look-up table, t2 0xff 0x24 r/w look-up table, t3 0xff 0x25 r/w look-up table, t4 0xff 0x26 r/w look-up table, t5 0xff 0x27 r/w look-up table, t6 0xff 0x28 r/w look-up table, t7 0xff 0x29 r/w look-up table, t8 0xff 0x2a r/w look-up table, rpm1, lsb 0xff 0x2b r/w look-up table, rpm1, msb 0xff 0x2c r/w look-up table, rpm2, lsb 0xff 0x2d r/w look-up table, rpm2, msb 0xff 0x2e r/w look-up table, rpm3, lsb 0xff 0x2f r/w look-up table, rpm3, msb 0xff 0x30 r/w look-up table, rpm4, lsb 0xff 0x31 r/w look-up table, rpm4, msb 0xff 0x32 r/w look-up table, rpm5, lsb 0xff 0x33 r/w look-up table, rpm5, msb 0xff 0x34 r/w look-up table, rpm6, lsb 0xff 0x35 r/w look-up table, rpm6, msb 0xff 0x36 r/w look-up table, rpm7, lsb 0xff 0x37 r/w look-up table, rpm7, msb 0xff 0x38 r/w look-up table, rpm8, lsb 0xff 0x39 r/w look-up table, rpm8, msb 0xff table 57. register 0x3a, look-up table hysteresis, power-on default = 0x02, lock = y, sw reset = y bit name r/w description <7:4> reserved r reserved. <3:0> look-up table hysteresis r/w these bits determine the hysteresis appl ied to the temperature thresholds in the look-up table. lsb size = 1c. table 58. register 0x3, fan response register, power-on default = 0x11, lock = y, sw reset = y bit name r/w description <7:3> reserved r reserved. <2:0> fan response r/w these bits set the fan?s response in the rpm control mode. 000 = 1.25 updates/s 001 = 2.5 updates/s (default) 010 = 5 updates/s 011 = 10 updates/s 100 = 20 updates/s 101 = 40 updates/s 110 = 80 updates/s 111 = 160 updates/s rev. 1 | page 36 of 39 | www.onsemi.com
adm1033 rev. 0 | page 37 of 40 table 59. register 0x3d, device id, power-on default = 0x33, lock = n, sw reset = n bit name r/w description <7:0> device id r this read-only value contains the device id, which is 0x33. table 60. register 0x3e, company id, power-on default = 0x41, lock = n, sw reset = n bit name r/w description <7:0> company id r this read-only value contains the company id, which is 0x41. table 61. register 0x3d, revision register, powe r-on default = 0x02, lock = n, sw reset = n bit name r/w description <7:0> revision id r this read-only value contains the revision id. table 62. register 0x40/41, local temperature registers, power-on default = 0x02, lock = n, sw reset = y bit name r/w description <4:0> local temperature lsb r contains the lsbs of the last measured local temperature value. resolution = 0.03125c. <12:5> local temperature msb r contains the msbs of the last measured local temperature value. resolution = 1c. table 63. register 0x42/43, remote temperature register s, power-on default = 0x00, lock = n, sw reset = y bit name r/w description <4:0> remote temperature lsb r contains the lsbs of the last measured remote temperature va lue. resolution = 0.03125c. <12:5> remote temperature msb r contai ns the msbs of the last measured remote temperature value. resolution = 1c. table 64. register 0x4a/4b, tach period, powe r-on default = 0xff, lock = n, sw reset = y bit name r/w description <7:0> fan period count, lsb r this register contains the lsbs of the last measur ed fan revolution count. <15:8> fan period count, msb r this register contains the msbs of the last measur ed fan revolution count. table 65. register 0x4e, therm % on-time; power-on default = 0x00, lock = n, sw reset = y bit name r/w description <7:0> therm % on time r this value represents the % on time of therm activity within the time window set by the configuration bits. table 66. register 0x4f, status 1, power-on default = 0x00, lock = n, sw reset = y bit name r/w description 7 local temp high r a 1 indicates th e local high limit has been tripped. 6 local temp low r a 1 indicates the local low limit has been tripped. 5 remote temp high r a 1 indicates th e remote high limit has been tripped. 4 remote temp low r a 1 indicates th e remote low limit has been tripped. 3 remote diode error r a 1 indicates a short or an open has been detected on the remote temperature channel. this test is completed once on each conversion. <2:0> reserved r reserved. rev. 1 | page 37 of 39 | www.onsemi.com
adm1033 rev. 0 | page 38 of 40 table 67. register 0x50, status 2, power-on default = 0x00, lock = n, sw reset = y bit name r/w description 7 local therm r a 1 indicates the local therm limit has been tripped. 6 remote therm r a 1 indicates the remote therm limit has been tripped. 5 reserved r reserved for future use. 4 therm % exceeded r a 1 indicates the therm signal has been asserted for longer than the programmed limit. clear on read. if therm % limit = 0x00 and therm is asserted, it reasserts immediately. 3 therm asserted r a 1 indicates the therm signal has been asserted low, as an input only. 2 therm _state r a 1 indicates the therm pin has been asserted low as an output. 1 reserved r reserved. 0 reserved r reserved. table 68. register 0x51, status register 3, po wer-on default = 0x00, lock = n, sw reset = y bit name r/w description 7 fan stalled r a 1 indicates the fan has stalled. 6 fan alarm speed r a 1 indicates the fan is running at full speed, du e to an alarm condition (for instance, if the therm temperature limit is exceeded). 5 reserved r reserved. 4 reserved r reserved. 3 reserved r reserved. 2 reserved r reserved. 1 reserved r reserved. 0 alert low r a 1 indicates the adm1033 has pulled the alert output pin low. allows polling of a single status register to determine if an alert condition has occurred in any of the status registers. rev. 1 | page 38 of 39 | www.onsemi.com
adm1033 rev. 0 | page 39 of 40 outline dimensions 16 9 8 1 pin 1 sea t i n g pl a n e 0. 01 0 0. 00 4 0. 01 2 0. 00 8 0. 025 bs c 0. 010 0. 006 0. 05 0 0. 01 6 8 0 coplanarity 0.004 0. 065 0. 049 0. 069 0. 053 0. 154 bs c 0. 2 3 6 bs c compliant to jedec standards mo-137ab 0. 1 9 3 bs c f i gure 44. 1 6 -l ead shrink sm al l o ut lin e p a ckage [qs o p ] (r q - 16) d i mensions sh o wn in inc h es ordering guide model temperature r a nge package descri ption package option adm1033arq ? 40c to +125c 16-lead qsop rq-16 adm1033arq-r eel ? 40c to +125c 16-lead qsop rq-16 adm1033arq-r eel7 ? 40c to +125c 16-lead qsop rq-16 adm1033arqz 1 ? 40c to +125c 16-lead qsop rq-16 adm1033arqz -reel 1 ? 40c to +125c 16-lead qsop rq-16 adm1033arqz -reel7 1 ? 40c to +125c 16-lead qsop rq-16 1 z = pb-free part. model temperature range package description package option adm1033arq -40c to +125c 16-lead qsop rq-16 adm1033arq-reel -40c to +125c 16-lead qsop rq-16 ADM1033ARQ-REEL7 -40c to +125c 16-lead qsop rq-16 adm1033arqz 1 -40c to +125c 16-lead qsop rq-16 adm1033arqz-reel 1 -40c to +125c 16-lead qsop rq-16 adm1033arqz-rl7 1 -40c to +125c 16-lead qsop rq-16 1 z = pb-free part on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifcally disclaims any and all liability, including without limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifcations can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customers technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its offcers, employees, subsidiaries, affliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affrmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. literature fulfillment: literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303-675-2175 or 800-344-3860 toll free usa/canada fax : 303-675-2176 or 800-344-3867 toll free usa/canada email : orderlit@onsemi.com n. american technical support : 800-282-9855 toll free usa/canada. europe, middle east and africa technical support : phone: 421 33 790 2910 japan customer focus cente r phone: 81-3-5773-3850 on semiconductor website: www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative publication ordering information rev. 1 | page 39 of 39 | www.onsemi.com

▲Up To Search▲

Price & Availability of ADM1033ARQ-REEL7

	To Download ADM1033ARQ-REEL7 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .